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https://opencores.org/ocsvn/apbtoaes128/apbtoaes128/trunk
[/] [apbtoaes128/] [trunk/] [rtl/] [shift_rows.v] - Diff between revs 3 and 7
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//// AES CORE BLOCK
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//// AES CORE BLOCK
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//// This file is part of the APB to AES128 project
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//// This file is part of the APB to I2C project
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//// http://www.opencores.org/cores/apbtoaes128/
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//// http://www.opencores.org/cores/apbi2c/
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//// Description
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//// Description
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output [127 : 0] data_out_dec, // Result after Shift Rows operation - dec
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output [127 : 0] data_out_dec, // Result after Shift Rows operation - dec
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//INPUTS
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//INPUTS
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input [127 : 0] data_in // Input Bus
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input [127 : 0] data_in // Input Bus
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);
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);
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localparam BUS_WIDTH = 128; // Bus Width
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localparam integer BUS_WIDTH = 128; // Bus Width
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localparam ST_WORD = 8; // Data Size of word in State MAtrix
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localparam integer ST_WORD = 8; // Data Size of word in State MAtrix
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localparam ST_LINE = 4; // Number of Lines of State Matrix
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localparam integer ST_LINE = 4; // Number of Lines of State Matrix
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localparam ST_COL = 4; // Number of Columns of State Matrix
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localparam integer ST_COL = 4; // Number of Columns of State Matrix
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wire [ST_WORD - 1 : 0] state[0 : ST_LINE - 1][0 : ST_COL - 1];
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wire [ST_WORD - 1 : 0] state[0 : ST_LINE - 1][0 : ST_COL - 1];
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wire [ST_WORD - 1 : 0] state_sft_l[0 : ST_LINE - 1][0 : ST_COL - 1];
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wire [ST_WORD - 1 : 0] state_sft_l[0 : ST_LINE - 1][0 : ST_COL - 1];
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wire [ST_WORD - 1 : 0] state_sft_r[0 : ST_LINE - 1][0 : ST_COL - 1];
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wire [ST_WORD - 1 : 0] state_sft_r[0 : ST_LINE - 1][0 : ST_COL - 1];
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