Line 40... |
Line 40... |
-- require two RAM blocks. For g_data_w=2*c_word_w=64b there is no
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-- require two RAM blocks. For g_data_w=2*c_word_w=64b there is no
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-- difference between these 2 schemes. Hence by rising the g_data_w to a
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-- difference between these 2 schemes. Hence by rising the g_data_w to a
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-- power of 2 multiple of 32b the user can enforce using splitting the data
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-- power of 2 multiple of 32b the user can enforce using splitting the data
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-- a c_word_w parts.
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-- a c_word_w parts.
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LIBRARY IEEE, common_pkg_lib, mm_lib, technology_lib, common_ram_lib, common_counter_lib, common_components_lib;
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LIBRARY IEEE, common_pkg_lib, astron_mm_lib, astron_ram_lib, astron_counter_lib, common_components_lib;
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USE IEEE.std_logic_1164.ALL;
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USE IEEE.std_logic_1164.ALL;
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USE IEEE.numeric_std.ALL;
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USE IEEE.numeric_std.ALL;
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USE common_pkg_lib.common_pkg.ALL;
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USE common_pkg_lib.common_pkg.ALL;
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USE common_ram_lib.common_ram_pkg.ALL;
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USE astron_ram_lib.common_ram_pkg.ALL;
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USE work.diag_pkg.ALL;
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USE work.diag_pkg.ALL;
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USE technology_lib.technology_select_pkg.ALL;
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--USE technology_lib.technology_select_pkg.ALL;
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ENTITY diag_data_buffer IS
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ENTITY diag_data_buffer IS
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GENERIC (
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GENERIC (
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g_technology : NATURAL := c_tech_select_default;
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g_technology : NATURAL := 0;
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g_data_w : NATURAL := 32;
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g_data_w : NATURAL := 32;
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g_nof_data : NATURAL := 1024;
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g_nof_data : NATURAL := 1024;
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g_use_in_sync : BOOLEAN := FALSE -- when TRUE start filling the buffer at the in_sync, else after the last word was read
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g_use_in_sync : BOOLEAN := FALSE -- when TRUE start filling the buffer at the in_sync, else after the last word was read
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);
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);
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PORT (
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PORT (
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Line 188... |
Line 188... |
nxt_wr_addr <= INCR_UVEC(wr_addr, 1);
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nxt_wr_addr <= INCR_UVEC(wr_addr, 1);
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END IF;
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END IF;
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END IF;
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END IF;
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END PROCESS;
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END PROCESS;
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u_buf : ENTITY common_ram_lib.common_ram_crw_crw_ratio
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u_buf : ENTITY astron_ram_lib.common_ram_crw_crw_ratio
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GENERIC MAP (
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GENERIC MAP (
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g_technology => g_technology,
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g_technology => g_technology,
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g_ram_a => c_buf_mm,
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g_ram_a => c_buf_mm,
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g_ram_b => c_buf_st,
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g_ram_b => c_buf_st,
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g_init_file => "UNUSED"
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g_init_file => "UNUSED"
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Line 217... |
Line 217... |
rd_en_b => '0',
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rd_en_b => '0',
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rd_dat_b => OPEN,
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rd_dat_b => OPEN,
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rd_val_b => OPEN
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rd_val_b => OPEN
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);
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);
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u_reg : ENTITY mm_lib.common_reg_r_w_dc
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u_reg : ENTITY astron_mm_lib.common_reg_r_w_dc
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GENERIC MAP (
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GENERIC MAP (
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g_reg => c_reg
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g_reg => c_reg
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)
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)
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PORT MAP (
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PORT MAP (
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-- Clocks and reset
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-- Clocks and reset
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Line 241... |
Line 241... |
out_reg => OPEN
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out_reg => OPEN
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);
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);
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reg_slv <= word_cnt & sync_cnt;
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reg_slv <= word_cnt & sync_cnt;
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u_word_cnt : ENTITY common_counter_lib.common_counter
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u_word_cnt : ENTITY astron_counter_lib.common_counter
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PORT MAP (
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PORT MAP (
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rst => st_rst,
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rst => st_rst,
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clk => st_clk,
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clk => st_clk,
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cnt_en => wr_en,
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cnt_en => wr_en,
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cnt_clr => wr_sync,
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cnt_clr => wr_sync,
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count => word_cnt
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count => word_cnt
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);
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);
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u_sync_cnt : ENTITY common_counter_lib.common_counter
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u_sync_cnt : ENTITY astron_counter_lib.common_counter
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PORT MAP (
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PORT MAP (
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rst => st_rst,
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rst => st_rst,
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clk => st_clk,
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clk => st_clk,
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cnt_en => wr_sync,
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cnt_en => wr_sync,
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cnt_clr => sync_cnt_clr,
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cnt_clr => sync_cnt_clr,
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