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-- See the License for the specific language governing permissions and
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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-- limitations under the License.
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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LIBRARY IEEE, common_pkg_lib, common_components_lib, common_ram_lib, technology_lib, tech_ram_lib;
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LIBRARY IEEE, common_pkg_lib, common_components_lib;
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USE IEEE.std_logic_1164.ALL;
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USE IEEE.std_logic_1164.ALL;
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USE common_pkg_lib.common_pkg.ALL;
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USE common_pkg_lib.common_pkg.ALL;
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USE common_ram_lib.common_ram_pkg.ALL;
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USE work.common_ram_pkg.ALL;
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USE technology_lib.technology_select_pkg.ALL;
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--USE technology_lib.technology_select_pkg.ALL;
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ENTITY common_ram_crw_crw_ratio IS
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ENTITY common_ram_crw_crw_ratio IS
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GENERIC (
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GENERIC (
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g_technology : NATURAL := c_tech_select_default;
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g_technology : NATURAL := 0;
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g_ram_a : t_c_mem := c_mem_ram; -- settings for port a
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g_ram_a : t_c_mem := c_mem_ram; -- settings for port a
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g_ram_b : t_c_mem := c_mem_ram; -- data width and address range for port b
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g_ram_b : t_c_mem := c_mem_ram; -- data width and address range for port b
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g_init_file : STRING := "UNUSED"
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g_init_file : STRING := "UNUSED"
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);
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);
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PORT (
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PORT (
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ASSERT g_ram_a.latency = g_ram_b.latency
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ASSERT g_ram_a.latency = g_ram_b.latency
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REPORT "common_ram_crw_crw_ratio : only support same read latency for both ports"
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REPORT "common_ram_crw_crw_ratio : only support same read latency for both ports"
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SEVERITY FAILURE;
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SEVERITY FAILURE;
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-- memory access
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-- memory access
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u_ramk : ENTITY tech_ram_lib.tech_memory_ram_crwk_crw
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u_ramk : ENTITY work.tech_memory_ram_crwk_crw
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GENERIC MAP (
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GENERIC MAP (
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g_technology => g_technology,
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g_technology => g_technology,
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g_adr_a_w => g_ram_a.adr_w,
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g_adr_a_w => g_ram_a.adr_w,
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g_adr_b_w => g_ram_b.adr_w,
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g_adr_b_w => g_ram_b.adr_w,
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g_dat_a_w => g_ram_a.dat_w,
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g_dat_a_w => g_ram_a.dat_w,
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