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[/] [async_sdm_noc/] [branches/] [clos_opt/] [clos_opt/] [src/] [clos_buf.v] - Diff between revs 74 and 75

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Rev 74 Rev 75
Line 27... Line 27...
   wia, nia, eia, lia,
   wia, nia, eia, lia,
   // Inputs
   // Inputs
   si0, si1, si2, si3, wi0, wi1, wi2, wi3, ni0, ni1, ni2, ni3, ei0,
   si0, si1, si2, si3, wi0, wi1, wi2, wi3, ni0, ni1, ni2, ni3, ei0,
   ei1, ei2, ei3, li0, li1, li2, li3, si4, wi4, ni4, ei4, li4, soa,
   ei1, ei2, ei3, li0, li1, li2, li3, si4, wi4, ni4, ei4, li4, soa,
   woa, noa, eoa, loa, soa4, woa4, noa4, eoa4, loa4, sdec, ndec, ldec,
   woa, noa, eoa, loa, soa4, woa4, noa4, eoa4, loa4, sdec, ndec, ldec,
   wdec, edec
   wdec, edec, rst_n
   );
   );
 
 
   parameter MN = 2;            // number of CMs
   parameter MN = 2;            // number of CMs
   parameter NN = 2;            // number of ports in an IM or OM, equ. to number of virtual circuits
   parameter NN = 2;            // number of ports in an IM or OM, equ. to number of virtual circuits
   parameter DW = 8;            // datawidth of a single virtual circuit/port
   parameter DW = 8;            // datawidth of a single virtual circuit/port
Line 68... Line 68...
`endif // !`ifdef ENABLE_CHANNEL_SLICING
`endif // !`ifdef ENABLE_CHANNEL_SLICING
 
 
   input [NN-1:0][3:0]           sdec, ndec, ldec; // the routing requests
   input [NN-1:0][3:0]           sdec, ndec, ldec; // the routing requests
   input [NN-1:0][1:0]         wdec, edec;         // the routing requests
   input [NN-1:0][1:0]         wdec, edec;         // the routing requests
 
 
 
   input                       rst_n; // global active low reset
 
 
   genvar                      i,j;
   genvar                      i,j;
 
 
 
 
   // the IMs
   // the IMs
   im #(.MN(MN), .NN(NN), .DW(DW), .SN(4))
   im #(.MN(MN), .NN(NN), .DW(DW), .SN(4))

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