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https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk
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History:
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History:
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05/05/2009 Initial version. <wsong83@gmail.com>
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05/05/2009 Initial version. <wsong83@gmail.com>
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20/05/2011 Change to general verilog description for opensource.
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20/05/2011 Change to general verilog description for opensource.
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The Nangate cell library is used. <wsong83@gmail.com>
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The Nangate cell library is used. <wsong83@gmail.com>
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31/05/2011 The bugs in the C2 description is fixed. <wsong83@gmail.com>
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01/06/2011 The bugs in the C2 and C2P1 gates are fixed. <wsong83@gmail.com>
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*/
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*/
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// General 2-input C-element
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// General 2-input C-element
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module c2 (a0, a1, q);
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module c2 (a0, a1, q);
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wire [2:0] m; // internal wires
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wire [2:0] m; // internal wires
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nand U1 (m[0], a0, a1, b);
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nand U1 (m[0], a0, a1, b);
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nand U2 (m[1], a0, q);
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nand U2 (m[1], a0, q);
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nand U3 (m[2], a1, q);
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nand U3 (m[2], a1, q);
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assign q = &m;
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assign q = ~&m;
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endmodule
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endmodule
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// the basic element of a tree arbiter
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// the basic element of a tree arbiter
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module tarb ( ngnt, ntgnt, req, treq );
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module tarb ( ngnt, ntgnt, req, treq );
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