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https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk
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Rev 51 |
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p0 -> L -> p1 -> RTC -> p2 -> L -> p3 -> DEMUX -> p[0] -> L -> p[1] -> L -> p[2] -> L -> p[3] -> L -> p[4]
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p0 -> L -> p1 -> RTC -> p2 -> L -> p3 -> DEMUX -> p[0] -> L -> p[1] -> L -> p[2] -> L -> p[3] -> L -> p[4]
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History:
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History:
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02/04/2010 Initial version. <wsong83@gmail.com>
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02/04/2010 Initial version. <wsong83@gmail.com>
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02/06/2011 Clean up for opensource. <wsong83@gmail.com>
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02/06/2011 Clean up for opensource. <wsong83@gmail.com>
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08/06/2011 The selection pin of the demux must be considered in the ack process. <wsong83@gmail.com>
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09/06/2011 The selection pin of the demux must be considered in the ack process. <wsong83@gmail.com>
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*/
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*/
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module rtu (/*AUTOARG*/
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module rtu (/*AUTOARG*/
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// Outputs
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// Outputs
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wire [SN-1:0] p2d;
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wire [SN-1:0] p2d;
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wire [VCN-1:0] p2vc;
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wire [VCN-1:0] p2vc;
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wire p2a, p2ad, p2avc, p2an;
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wire p2a, p2ad, p2avc, p2an;
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wire [SN-1:0] p3d;
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wire [SN-1:0] p3d;
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wire [VCN-1:0] p3vc;
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wire [VCN-1:0] p3vc;
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wire p3a, p3an, p3ad;
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wire p3a, p3an;
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wire [PD*2:0][VCN-1:0][SN-1:0] pd;
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wire [PD*2:0][VCN-1:0][SN-1:0] pd;
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wire [PD*2:0][VCN-1:0] pda, pdan;
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wire [PD*2:0][VCN-1:0] pda, pdan;
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wire [2:0] x_cmp [1:0];
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wire [2:0] x_cmp [1:0];
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wire [2:0] y_cmp [1:0];
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wire [2:0] y_cmp [1:0];
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);
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);
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// p3 -> DEMUX -> pd[0]
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// p3 -> DEMUX -> pd[0]
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ddmux #(.DW(SN), .VCN(VCN))
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ddmux #(.DW(SN), .VCN(VCN))
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RTDM (
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RTDM (
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.d_in_a ( p3ad ),
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.d_in_a ( p3a ),
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.d_out ( pd[0] ),
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.d_out ( pd[0] ),
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.d_in ( p3d ),
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.d_in ( p3d ),
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.d_sel ( p3vc ),
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.d_sel ( p3vc ),
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.d_out_a ( pda[0])
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.d_out_a ( pda[0])
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);
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);
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c2 CP3A (.q(p3a), .a0(p3ad), .a1(|p3vc));
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//c2 CP3A (.q(p3a), .a0(p3ad), .a1(|p3vc));
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assign p3an = (~p3a) & rst_n;
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assign p3an = (~p3a) & rst_n;
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// pd pipeline
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// pd pipeline
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generate
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generate
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for(gbd=0; gbd<PD*2; gbd++) begin:RT
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for(gbd=0; gbd<PD*2; gbd++) begin:RT
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