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[/] [async_sdm_noc/] [branches/] [init/] [vc/] [tb/] [rtdriver.cpp] - Diff between revs 43 and 45

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Rev 43 Rev 45
Line 26... Line 26...
    rtia("rtia"),
    rtia("rtia"),
    rtic("rtic"),
    rtic("rtic"),
    rtica("rtica"),
    rtica("rtica"),
    rtoa("rtoa"),
    rtoa("rtoa"),
    rtoc("rtoc"),
    rtoc("rtoc"),
    rtoca("rtoca"),
    rtoca("rtoca")
    IPD("VCIP"),
 
    OPD("VCOP")
 
{
{
  SC_METHOD(IPdetect);
  SC_METHOD(IPdetect);
  sensitive << rtia;
  sensitive << rtia;
 
 
  SC_METHOD(OPdetect);
  SC_METHOD(OPdetect);
Line 48... Line 46...
  SC_THREAD(send);
  SC_THREAD(send);
  SC_THREAD(recv);
  SC_THREAD(recv);
 
 
  rtinp_sig = false;
  rtinp_sig = false;
  rtoutp_sig = false;
  rtoutp_sig = false;
 
 
  sc_spawn_options th_opt;
 
  for(unsigned int i=0; i<SubChN; i++)
 
    sc_spawn(sc_bind(&RTDriver::credit, this, i), NULL, &th_opt);
 
}
}
 
 
void RTDriver::IPdetect() {
void RTDriver::IPdetect() {
  sc_logic ack_lv_high, ack_lv_low;             // the sc_logic ack
  sc_logic ack_lv_high, ack_lv_low;             // the sc_logic ack
 
 
Line 70... Line 64...
}
}
 
 
void RTDriver::OPdetect() {
void RTDriver::OPdetect() {
  sc_lv<ChBW*4> data_lv;        // the ORed data
  sc_lv<ChBW*4> data_lv;        // the ORed data
  sc_logic data_lv_high, data_lv_low;
  sc_logic data_lv_high, data_lv_low;
 
  sc_lv<SubChN> vc_lv;          // the local copy of vc number
 
  sc_lv<3> ft_lv;               // the local copy of flit type
 
 
  data_lv = rtod[0].read() | rtod[1].read() | rtod[2].read() | rtod[3].read();
  data_lv = rtod[0].read() | rtod[1].read() | rtod[2].read() | rtod[3].read();
  data_lv_high = data_lv.and_reduce() & rtovc.read().or_reduce() & rtoft.read().or_reduce();
  vc_lv = rtovc.read();
  data_lv_low = data_lv.or_reduce() | rtovc.read().or_reduce() | rtoft.read().or_reduce();
  ft_lv = rtoft.read();
 
  data_lv_high = (sc_logic)(data_lv.and_reduce()) & (sc_logic)(vc_lv.or_reduce()) & (sc_logic)(ft_lv.or_reduce());
 
  data_lv_low = (sc_logic)(data_lv.or_reduce()) | (sc_logic)(vc_lv.or_reduce()) | (sc_logic)(ft_lv.or_reduce());
 
 
  if(data_lv_high.is_01() && data_lv_high.to_bool())
  if(data_lv_high.is_01() && data_lv_high.to_bool())
    rtoutp_sig = true;
    rtoutp_sig = true;
 
 
  if(data_lv_high.is_01() && (!data_lv_low.to_bool()))
  if(data_lv_high.is_01() && (!data_lv_low.to_bool()))
Line 160... Line 158...
    // flit type
    // flit type
    switch(mflit.ftype) {
    switch(mflit.ftype) {
    case F_HD: mft[0] = SC_LOGIC_1; break;
    case F_HD: mft[0] = SC_LOGIC_1; break;
    case F_DAT: mft[1] = SC_LOGIC_1; break;
    case F_DAT: mft[1] = SC_LOGIC_1; break;
    case F_TL: mft[2] = SC_LOGIC_1; break;
    case F_TL: mft[2] = SC_LOGIC_1; break;
    default:
    default: break;
    }
    }
 
 
    // VC number
    // VC number
    mvc[mflit.vcn] = SC_LOGIC_1;
    mvc[mflit.vcn] = SC_LOGIC_1;
 
 
Line 212... Line 210...
 
 
  // initialize the ack signal
  // initialize the ack signal
  rtoa.write(mack);
  rtoa.write(mack);
 
 
  while(true) {
  while(true) {
    // clear the flit
 
    mflit.clear();
 
 
 
    // wait for an incoming flit
    // wait for an incoming flit
    wait(rtoutp_sig.posedge_event());
    wait(rtoutp_sig.posedge_event());
 
    if(out_cred_ack[mflit.vcn].read())
 
      wait(out_cred_ack[mflit.vcn].negedge_event());
 
 
 
    // clear the flit
 
    mflit.clear();
 
 
    // analyse the flit
    // analyse the flit
    mdata[0] = rtod[0].read();
    mdata[0] = rtod[0].read();
    mdata[1] = rtod[1].read();
    mdata[1] = rtod[1].read();
    mdata[2] = rtod[2].read();
    mdata[2] = rtod[2].read();
Line 268... Line 268...
      }
      }
    }
    }
 
 
    // get the binary vc number
    // get the binary vc number
    unsigned int fvcn = mvc.to_uint();
    unsigned int fvcn = mvc.to_uint();
    while(fvcn != 0) {
    while(fvcn != 1) {
      mflit.vcn += 1;
      mflit.vcn += 1;
      fvcn >>= 1;
      fvcn >>= 1;
    }
    }
 
 
    // send the flit to the NI
    // send the flit to the NI
    P2NI->write(mflit);
    P2NI->write(mflit);
 
 
 
    // send back a credit
 
    out_cred[mflit.vcn] = true;
 
 
    wait(0.2, SC_NS);           // a delay to avoid data override
    wait(0.2, SC_NS);           // a delay to avoid data override
    rtoa.write(~mack);          // notify that data is captured
    rtoa.write(~mack);          // notify that data is captured
 
 
    // wait for the data withdrawal
    // wait for the data withdrawal
    wait(rtoutp_sig.negedge_event());
    wait(rtoutp_sig.negedge_event());
 
    if(!out_cred_ack[mflit.vcn].read())
 
      wait(out_cred_ack[mflit.vcn].posedge_event());
 
 
    wait(0.2, SC_NS);           // a delay to avoid data override
    wait(0.2, SC_NS);           // a delay to avoid data override
    rtoa.write(mack);           // notify that data is captured
    rtoa.write(mack);           // notify that data is captured
 
    out_cred[mflit.vcn] = false;
  }
  }
}
}
 
 
void RTDriver::credit(unsigned int dd) {
 
  out_cred[dd] = false;
 
 
 
  while(true){
 
    wait(out_cred_ack[dd].posedge_event());
 
    wait(0.2, SC_NS);
 
 
 
    out_cred[dd] = true;
 
 
 
    wait(out_cred_ack[dd].negedge_event());
 
    wait(0.2, SC_NS);
 
 
 
    out_cred[dd] = false;
 
  }
 
}
 
 
 
 
 
unsigned int RTDriver::c1o42b(unsigned int dd) {
unsigned int RTDriver::c1o42b(unsigned int dd) {
  switch(dd) {
  switch(dd) {
  case 1: return 0;
  case 1: return 0;
  case 2: return 1;
  case 2: return 1;
  case 4: return 2;
  case 4: return 2;

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