URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] [trunk/] [README] - Diff between revs 48 and 80

Rev 48	Rev 80
Line 89...	Line 89...
`7. the synthesized netlist is inside [sdm/vc]/syn/file/`	`7. the synthesized netlist is inside [sdm/vc]/syn/file/`

`* to run post-synthesis simulation`	`* to run post-synthesis simulation`
`1. check the netlists in [sdm/vc]/syn/file/`	`1. check the netlists in [sdm/vc]/syn/file/`
`2. modify the testbench configuration "define.h" according to your requirements.`	`2. modify the testbench configuration "define.h" according to your requirements.`
	`Especially make sure the following are matched (at least in the SDM routers):`
	`ChBW = DW/8; SubChN = VCN`
`3. make sure your NC-Simulator is installed alright (proper SystemC support).`	`3. make sure your NC-Simulator is installed alright (proper SystemC support).`
`4. run the compilation at [sdm/vc]/sim`	`4. run the compilation at [sdm/vc]/sim`
`compile.tcl`	`compile.sh`
`5. run the simulation at [sdm/vc]/sim`	`5. run the simulation at [sdm/vc]/sim`
`ncsim -tcl noctb`	`ncsim -tcl noctb`
`6. the simulation output files are *.ana at [sdm/vc]/sim`	`6. the simulation output files are *.ana at [sdm/vc]/sim`
`"throughput.ana":`	`"throughput.ana":`
`{simulation time in ps} TAB {throughput in bytes}`	`{simulation time in ps} TAB {throughput in bytes}`