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[/] [async_sdm_noc/] [trunk/] [vc/] [src/] [rtu.v] - Diff between revs 47 and 53

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Rev 47 Rev 53
Line 13... Line 13...
 p0 -> L -> p1 -> RTC -> p2 -> L -> p3 -> DEMUX -> p[0] -> L -> p[1] -> L -> p[2] -> L -> p[3] -> L -> p[4]
 p0 -> L -> p1 -> RTC -> p2 -> L -> p3 -> DEMUX -> p[0] -> L -> p[1] -> L -> p[2] -> L -> p[3] -> L -> p[4]
 
 
 History:
 History:
 02/04/2010  Initial version. <wsong83@gmail.com>
 02/04/2010  Initial version. <wsong83@gmail.com>
 02/06/2011  Clean up for opensource. <wsong83@gmail.com>
 02/06/2011  Clean up for opensource. <wsong83@gmail.com>
 08/06/2011  The selection pin of the demux must be considered in the ack process. <wsong83@gmail.com>
 09/06/2011  The selection pin of the demux must be considered in the ack process. <wsong83@gmail.com>
 
 
*/
*/
 
 
module rtu (/*AUTOARG*/
module rtu (/*AUTOARG*/
   // Outputs
   // Outputs
Line 49... Line 49...
   wire [SN-1:0]    p2d;
   wire [SN-1:0]    p2d;
   wire [VCN-1:0]   p2vc;
   wire [VCN-1:0]   p2vc;
   wire             p2a, p2ad, p2avc, p2an;
   wire             p2a, p2ad, p2avc, p2an;
   wire [SN-1:0]    p3d;
   wire [SN-1:0]    p3d;
   wire [VCN-1:0]   p3vc;
   wire [VCN-1:0]   p3vc;
   wire             p3a, p3an, p3ad;
   wire             p3a, p3an;
   wire [PD*2:0][VCN-1:0][SN-1:0] pd;
   wire [PD*2:0][VCN-1:0][SN-1:0] pd;
   wire [PD*2:0][VCN-1:0]           pda, pdan;
   wire [PD*2:0][VCN-1:0]           pda, pdan;
 
 
   wire [2:0]                      x_cmp [1:0];
   wire [2:0]                      x_cmp [1:0];
   wire [2:0]                      y_cmp [1:0];
   wire [2:0]                      y_cmp [1:0];
Line 144... Line 144...
        );
        );
 
 
   // p3 -> DEMUX -> pd[0]
   // p3 -> DEMUX -> pd[0]
   ddmux #(.DW(SN), .VCN(VCN))
   ddmux #(.DW(SN), .VCN(VCN))
   RTDM (
   RTDM (
         .d_in_a  ( p3ad  ),
         .d_in_a  ( p3a   ),
         .d_out   ( pd[0] ),
         .d_out   ( pd[0] ),
         .d_in    ( p3d   ),
         .d_in    ( p3d   ),
         .d_sel   ( p3vc  ),
         .d_sel   ( p3vc  ),
         .d_out_a ( pda[0])
         .d_out_a ( pda[0])
         );
         );
 
 
   c2 CP3A (.q(p3a), .a0(p3ad), .a1(|p3vc));
   //c2 CP3A (.q(p3a), .a0(p3ad), .a1(|p3vc));
   assign p3an = (~p3a) & rst_n;
   assign p3an = (~p3a) & rst_n;
 
 
   // pd pipeline
   // pd pipeline
   generate
   generate
      for(gbd=0; gbd<PD*2; gbd++) begin:RT
      for(gbd=0; gbd<PD*2; gbd++) begin:RT

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