| Line 43... |
Line 43... |
entity user is port(
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entity user is port(
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/* Comment-out for simulation. */
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/* Comment-out for simulation. */
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-- clk,reset:in std_ulogic;
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-- clk,reset:in std_ulogic;
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|
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/* AXI Master interface */
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/* AXI Master interface */
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-- axiMaster_in:in tAxi4StreamTransactor_s2m;
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-- axiMaster_in:in t_axi4StreamTransactor_s2m;
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axiMaster_out:buffer tAxi4StreamTransactor_m2s
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axiMaster_out:buffer t_axi4StreamTransactor_m2s
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|
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/* Debug ports. */
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/* Debug ports. */
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);
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);
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end entity user;
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end entity user;
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| Line 57... |
Line 57... |
constant maxSymbols:positive:=2048; --maximum number of symbols allowed to be transmitted in a frame. Each symbol's width equals tData's width.
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constant maxSymbols:positive:=2048; --maximum number of symbols allowed to be transmitted in a frame. Each symbol's width equals tData's width.
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signal symbolsPerTransfer:t_cnt;
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signal symbolsPerTransfer:t_cnt;
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signal outstandingTransactions:t_cnt;
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signal outstandingTransactions:t_cnt;
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|
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/* BFM signalling. */
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/* BFM signalling. */
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signal readRequest,next_readRequest:tBfmCtrl:=((others=>'0'),(others=>'0'),false);
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signal readRequest,next_readRequest:t_bfm:=((others=>'0'),(others=>'0'),false);
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signal writeRequest,next_writeRequest:tBfmCtrl:=((others=>'0'),(others=>'0'),false);
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signal writeRequest,next_writeRequest:t_bfm:=((others=>'0'),(others=>'0'),false);
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signal readResponse,next_readResponse:tBfmCtrl;
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signal readResponse,next_readResponse:t_bfm;
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signal writeResponse,next_writeResponse:tBfmCtrl;
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signal writeResponse,next_writeResponse:t_bfm;
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|
|
|
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/* Tester signals. */
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/* Tester signals. */
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/* synthesis translate_off */
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/* synthesis translate_off */
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signal clk,reset:std_ulogic:='0';
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signal clk,reset:std_ulogic:='0';
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signal axiMaster_in:tAxi4StreamTransactor_s2m;
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signal axiMaster_in:t_axi4StreamTransactor_s2m;
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/* synthesis translate_on */
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/* synthesis translate_on */
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|
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signal irq_write:std_ulogic; -- clock gating.
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signal irq_write:std_ulogic; -- clock gating.
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|
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begin
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begin
|
