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Line 101... |
// insert_rand_chk(input master_num, input burst_num)
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// insert_rand_chk(input master_num, input burst_num)
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// Description: add multiple commands to command FIFO. Each command writes incremental data to a random address, reads the data back and checks the data. Useful for random testing.
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// Description: add multiple commands to command FIFO. Each command writes incremental data to a random address, reads the data back and checks the data. Useful for random testing.
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// Parameters: master_num - number of internal master
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// Parameters: master_num - number of internal master
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// burst_num - total number of bursts to check
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// burst_num - total number of bursts to check
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//
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//
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// insert_rand(input burst_num)
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// Description: disperces burst_num between internal masters and calls insert_rand_chk for each master
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// Parameters: burst_num - total number of bursts to check (combined)
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//
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//
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//
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// Parameters:
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// Parameters:
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//
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//
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// For random testing: (changing these values automatically update interanl masters)
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// For random testing: (changing these values automatically update interanl masters)
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// len_min - minimum burst AXI LEN (length)
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// len_min - minimum burst AXI LEN (length)
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Line 126... |
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ITER IX ID_NUM
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ITER IX ID_NUM
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module PREFIX(PORTS);
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module PREFIX(PORTS);
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`include "prgen_rand.v"
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input clk;
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input clk;
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input reset;
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input reset;
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port GROUP_STUB_AXI;
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port GROUP_STUB_AXI;
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Line 166... |
.reset(reset),
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.reset(reset),
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.GROUP_STUB_AXI(GROUP_STUB_AXI_IX),
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.GROUP_STUB_AXI(GROUP_STUB_AXI_IX),
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.idle(idle_IX),
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.idle(idle_IX),
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.scrbrd_empty(scrbrd_empty_IX)
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.scrbrd_empty(scrbrd_empty_IX)
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);
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);
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ENDLOOP IX
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ENDLOOP IX
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IFDEF TRUE(ID_NUM==1)
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IFDEF TRUE(ID_NUM==1)
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assign GROUP_STUB_AXI.OUT = GROUP_STUB_AXI_0.OUT;
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assign GROUP_STUB_AXI.OUT = GROUP_STUB_AXI_0.OUT;
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assign GROUP_STUB_AXI_0.IN = GROUP_STUB_AXI.IN;
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assign GROUP_STUB_AXI_0.IN = GROUP_STUB_AXI.IN;
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ELSE TRUE(ID_NUM==1)
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ELSE TRUE(ID_NUM==1)
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CREATE ic.v DEFCMD(SWAP.GLOBAL PARENT PREFIX) DEFCMD(SWAP.GLOBAL MASTER_NUM ID_NUM) DEFCMD(SWAP.GLOBAL CONST(ID_BITS) ID_BITS) DEFCMD(SWAP.GLOBAL CONST(CMD_DEPTH) CMD_DEPTH) DEFCMD(SWAP.GLOBAL CONST(DATA_BITS) DATA_BITS) DEFCMD(SWAP.GLOBAL CONST(ADDR_BITS) ADDR_BITS)
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CREATE ic.v \\
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DEFCMD(SWAP.GLOBAL PARENT PREFIX) \\
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DEFCMD(SWAP.GLOBAL MASTER_NUM ID_NUM) \\
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DEFCMD(SWAP.GLOBAL SLAVE_NUM 1) \\
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DEFCMD(SWAP.GLOBAL CONST(ID_BITS) ID_BITS) \\
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DEFCMD(SWAP.GLOBAL CONST(CMD_DEPTH) CMD_DEPTH) \\
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DEFCMD(SWAP.GLOBAL CONST(DATA_BITS) DATA_BITS) \\
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DEFCMD(SWAP.GLOBAL CONST(ADDR_BITS) ADDR_BITS)
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LOOP IX ID_NUM
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LOOP IX ID_NUM
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STOMP NEWLINE
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STOMP NEWLINE
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DEFCMD(LOOP.GLOBAL MIX_IDX 1)
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DEFCMD(LOOP.GLOBAL MIX_IDX 1) \\
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STOMP NEWLINE
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DEFCMD(SWAP.GLOBAL ID_MIX_ID0 IDIX_VAL)
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DEFCMD(SWAP.GLOBAL ID_MIX_ID0 IDIX_VAL)
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ENDLOOP IX
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ENDLOOP IX
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PREFIX_ic PREFIX_ic(
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PREFIX_ic PREFIX_ic(
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.clk(clk),
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.clk(clk),
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| Line 327... |
Line 339... |
IX : PREFIX_singleIX.insert_rand_chk(burst_num);
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IX : PREFIX_singleIX.insert_rand_chk(burst_num);
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endcase
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endcase
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end
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end
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endtask
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endtask
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task insert_rand;
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input [31:0] burst_num;
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ITER IDX ID_NUM
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reg [31:0] burst_numIDX;
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integer remain;
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begin
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remain = burst_num;
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LOOP IDX ID_NUM
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if (remain > 0)
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begin
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burst_numIDX = rand(1, remain);
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remain = remain - burst_numIDX;
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insert_rand_chk(IDX, burst_numIDX);
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end
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ENDLOOP IDX
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end
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endtask
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endmodule
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endmodule
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