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Subversion Repositories bluespec-h264

[/] [bluespec-h264/] [trunk/] [src/] [mkDeblockFilter.bsv] - Diff between revs 39 and 40

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Rev 39 Rev 40
Line 365... Line 365...
   IbSVector bSfileHor <- mkbSVector();
   IbSVector bSfileHor <- mkbSVector();
   IbSVector bSfileVer <- mkbSVector();
   IbSVector bSfileVer <- mkbSVector();
 
 
   Reg#(Bit#(6)) cleanup_state <- mkReg(0);
   Reg#(Bit#(6)) cleanup_state <- mkReg(0);
 
 
   Vector#(4, FIFO#(Bit#(32))) rowToColumnStore <- replicateM(mkFIFO);
   Vector#(4, FIFO#(Bit#(32))) rowToColumnStore <- replicateM(mkSizedFIFO(3));
   Reg#(Bit#(2)) rowToColumnState <- mkReg(0);
   Reg#(Bit#(2)) rowToColumnState <- mkReg(0);
   FIFO#(Tuple2#(Bit#(4),Bit#(1))) rowToColumnStoreBlock <- mkFIFO(); // The third bit 1 is to rotate the damned
   FIFO#(Tuple2#(Bit#(4),Bit#(1))) rowToColumnStoreBlock <- mkSizedFIFO(3); // The third bit 1 is to rotate the damned
                                                                              // last left vector block
                                                                              // last left vector block
   FIFO#(Tuple2#(Bit#(4), Bit#(32))) verticalFilterBlock <- mkFIFO();
   FIFO#(Tuple2#(Bit#(4), Bit#(32))) verticalFilterBlock <- mkFIFO();
 
 
   Reg#(Bit#(2)) columnState <- mkReg(0);
   Reg#(Bit#(2)) columnState <- mkReg(0);
   Vector#(4, FIFO#(Bit#(32))) columnToRowStore <- replicateM(mkFIFO);
   Vector#(4, FIFO#(Bit#(32))) columnToRowStore <- replicateM(mkSizedFIFO(3));
   Reg#(Bit#(2)) columnToRowState <- mkReg(0);
   Reg#(Bit#(2)) columnToRowState <- mkReg(0);
   FIFO#(Tuple2#(Bit#(4), Bit#(1))) columnToRowStoreBlock <- mkFIFO();
   FIFO#(Tuple2#(Bit#(4), Bit#(1))) columnToRowStoreBlock <- mkFIFO;
 
 
   Reg#(Bit#(2)) columnNumber <- mkReg(0);
   Reg#(Bit#(2)) columnNumber <- mkReg(0);
 
 
   // Debugging register
   // Debugging register
   Reg#(Bit#(32)) fifo_full_count <- mkReg(0);
   Reg#(Bit#(32)) fifo_full_count <- mkReg(0);
   Reg#(Bit#(32)) fifo_empty_count <- mkReg(0);
   Reg#(Bit#(32)) fifo_empty_count <- mkReg(0);
   Reg#(Bit#(32)) total_cycles <- mkReg(0);
   Reg#(Bit#(32)) total_cycles <- mkReg(0);
 
 
   //-----------------------------------------------------------
 
   // Rules
 
 
 
   rule incr;
   rule incr;
     total_cycles <= total_cycles + 1;
     total_cycles <= total_cycles + 1;
   endrule
   endrule
 
 

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