| Line 48... |
Line 48... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.24 2003/02/18 00:10:15 mohor
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// Most of the registers added. Registers "arbitration lost capture", "error code
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// capture" + few more still need to be added.
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//
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// Revision 1.23 2003/02/14 20:17:01 mohor
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// Revision 1.23 2003/02/14 20:17:01 mohor
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// Several registers added. Not finished, yet.
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// Several registers added. Not finished, yet.
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//
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//
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// Revision 1.22 2003/02/12 14:23:59 mohor
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// Revision 1.22 2003/02/12 14:23:59 mohor
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// abort_tx added. Bit destuff fixed.
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// abort_tx added. Bit destuff fixed.
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| Line 164... |
Line 168... |
tx_request,
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tx_request,
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abort_tx,
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abort_tx,
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self_rx_request,
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self_rx_request,
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single_shot_transmission,
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single_shot_transmission,
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/* Arbitration Lost Capture Register */
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read_arbitration_lost_capture_reg,
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/* Error Code Capture Register */
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read_error_code_capture_reg,
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error_capture_code,
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/* Error Warning Limit register */
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/* Error Warning Limit register */
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error_warning_limit,
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error_warning_limit,
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/* Rx Error Counter register */
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/* Rx Error Counter register */
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we_rx_err_cnt,
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we_rx_err_cnt,
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| Line 190... |
Line 201... |
receive_status,
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receive_status,
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tx_successful,
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tx_successful,
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need_to_tx,
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need_to_tx,
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overrun,
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overrun,
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info_empty,
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info_empty,
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go_error_frame,
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set_bus_error_irq,
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priority_lost,
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set_arbitration_lost_irq,
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arbitration_lost_capture,
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node_error_passive,
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node_error_passive,
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node_error_active,
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node_error_active,
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rx_message_counter,
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/* This section is for BASIC and EXTENDED mode */
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/* This section is for BASIC and EXTENDED mode */
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/* Acceptance code register */
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/* Acceptance code register */
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| Line 267... |
Line 280... |
input tx_request;
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input tx_request;
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input abort_tx;
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input abort_tx;
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input self_rx_request;
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input self_rx_request;
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input single_shot_transmission;
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input single_shot_transmission;
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/* Arbitration Lost Capture Register */
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input read_arbitration_lost_capture_reg;
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/* Error Code Capture Register */
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input read_error_code_capture_reg;
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output [7:0] error_capture_code;
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/* Error Warning Limit register */
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/* Error Warning Limit register */
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input [7:0] error_warning_limit;
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input [7:0] error_warning_limit;
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/* Rx Error Counter register */
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/* Rx Error Counter register */
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input we_rx_err_cnt;
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input we_rx_err_cnt;
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| Line 290... |
Line 310... |
output receive_status;
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output receive_status;
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output tx_successful;
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output tx_successful;
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output need_to_tx;
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output need_to_tx;
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output overrun;
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output overrun;
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output info_empty;
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output info_empty;
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output go_error_frame;
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output set_bus_error_irq;
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output priority_lost;
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output set_arbitration_lost_irq;
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output [4:0] arbitration_lost_capture;
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output node_error_passive;
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output node_error_passive;
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output node_error_active;
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output node_error_active;
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output [6:0] rx_message_counter;
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/* This section is for BASIC and EXTENDED mode */
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/* This section is for BASIC and EXTENDED mode */
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/* Acceptance code register */
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/* Acceptance code register */
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input [7:0] acceptance_code_0;
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input [7:0] acceptance_code_0;
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| Line 396... |
Line 418... |
reg [2:0] overload_cnt1;
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reg [2:0] overload_cnt1;
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reg [2:0] overload_cnt2;
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reg [2:0] overload_cnt2;
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reg tx;
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reg tx;
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reg crc_err;
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reg crc_err;
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reg priority_lost;
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reg arbitration_lost;
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reg arbitration_lost_q;
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reg [4:0] arbitration_lost_capture;
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reg arbitration_cnt_en;
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reg arbitration_blocked;
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reg tx_q;
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reg tx_q;
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reg need_to_tx; // When the CAN core has something to transmit and a dominant bit is sampled at the third bit
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reg need_to_tx; // When the CAN core has something to transmit and a dominant bit is sampled at the third bit
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reg [3:0] data_cnt; // Counting the data bytes that are written to FIFO
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reg [3:0] data_cnt; // Counting the data bytes that are written to FIFO
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reg [2:0] header_cnt; // Counting header length
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reg [2:0] header_cnt; // Counting header length
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| Line 436... |
Line 462... |
reg susp_cnt_en;
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reg susp_cnt_en;
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reg [2:0] susp_cnt;
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reg [2:0] susp_cnt;
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reg go_error_frame_q;
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reg go_error_frame_q;
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reg error_flag_over_blocked;
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reg error_flag_over_blocked;
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reg [7:0] error_capture_code;
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reg [7:6] error_capture_code_type;
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reg error_capture_code_blocked;
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wire [4:0] error_capture_code_segment;
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wire error_capture_code_direction;
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wire bit_de_stuff;
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wire bit_de_stuff;
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wire bit_de_stuff_tx;
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wire bit_de_stuff_tx;
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/* Rx state machine */
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/* Rx state machine */
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| Line 458... |
Line 491... |
wire go_rx_ack;
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wire go_rx_ack;
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wire go_rx_ack_lim;
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wire go_rx_ack_lim;
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wire go_rx_eof;
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wire go_rx_eof;
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wire go_overload_frame;
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wire go_overload_frame;
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wire go_rx_inter;
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wire go_rx_inter;
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wire go_error_frame;
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wire go_crc_enable;
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wire go_crc_enable;
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wire rst_crc_enable;
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wire rst_crc_enable;
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wire bit_de_stuff_set;
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wire bit_de_stuff_set;
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| Line 567... |
Line 601... |
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assign remote_rq = ((~ide) & rtr1) | (ide & rtr2);
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assign remote_rq = ((~ide) & rtr1) | (ide & rtr2);
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assign limited_data_len = (data_len < 8)? data_len : 4'h8;
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assign limited_data_len = (data_len < 8)? data_len : 4'h8;
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assign ack_err = rx_ack & sample_point & sampled_bit & tx_state & (~self_test_mode);
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assign ack_err = rx_ack & sample_point & sampled_bit & tx_state & (~self_test_mode);
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assign bit_err = (tx_state | error_frame | overload_frame | rx_ack) & sample_point & (tx !== sampled_bit) & (~bit_err_exc1) & (~bit_err_exc2) & (~bit_err_exc3) & (~bit_err_exc4) & (~bit_err_exc5);
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assign bit_err = (tx_state | error_frame | overload_frame | rx_ack) & sample_point & (tx != sampled_bit) & (~bit_err_exc1) & (~bit_err_exc2) & (~bit_err_exc3) & (~bit_err_exc4) & (~bit_err_exc5);
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assign bit_err_exc1 = tx_state & arbitration_field & tx;
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assign bit_err_exc1 = tx_state & arbitration_field & tx;
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assign bit_err_exc2 = rx_ack & tx;
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assign bit_err_exc2 = rx_ack & tx;
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assign bit_err_exc3 = error_frame & node_error_passive & (error_cnt1 < 7);
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assign bit_err_exc3 = error_frame & node_error_passive & (error_cnt1 < 7);
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assign bit_err_exc4 = (error_frame & (error_cnt1 == 7) & (~enable_error_cnt2)) | (overload_frame & (overload_cnt1 == 7) & (~enable_overload_cnt2));
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assign bit_err_exc4 = (error_frame & (error_cnt1 == 7) & (~enable_error_cnt2)) | (overload_frame & (overload_cnt1 == 7) & (~enable_overload_cnt2));
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assign bit_err_exc5 = (error_frame & (error_cnt2 == 7)) | (overload_frame & (overload_cnt2 == 7));
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assign bit_err_exc5 = (error_frame & (error_cnt2 == 7)) | (overload_frame & (overload_cnt2 == 7));
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| Line 1289... |
Line 1323... |
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.reset_mode(reset_mode),
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.reset_mode(reset_mode),
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.release_buffer(release_buffer),
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.release_buffer(release_buffer),
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.extended_mode(extended_mode),
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.extended_mode(extended_mode),
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.overrun(overrun),
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.overrun(overrun),
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.info_empty(info_empty)
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.info_empty(info_empty),
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.info_cnt(rx_message_counter)
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);
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);
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// Transmitting error frame.
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// Transmitting error frame.
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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| Line 1592... |
Line 1625... |
else if (go_early_tx | (tx_point & tx_state & (~bit_de_stuff_tx)))
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else if (go_early_tx | (tx_point & tx_state & (~bit_de_stuff_tx)))
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tx_pointer <=#Tp tx_pointer + 1'b1;
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tx_pointer <=#Tp tx_pointer + 1'b1;
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end
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end
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assign tx_successful = transmitter & go_rx_inter & ((~error_frame_ended) & (~overload_frame_ended) & (~priority_lost) | single_shot_transmission);
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assign tx_successful = transmitter & go_rx_inter & ((~error_frame_ended) & (~overload_frame_ended) & (~arbitration_lost) | single_shot_transmission);
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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begin
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begin
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if (rst)
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if (rst)
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| Line 1616... |
Line 1649... |
// Tx state
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// Tx state
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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begin
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begin
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if (rst)
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if (rst)
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tx_state <= 1'b0;
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tx_state <= 1'b0;
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else if (reset_mode | go_rx_inter | error_frame | priority_lost)
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else if (reset_mode | go_rx_inter | error_frame | arbitration_lost)
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tx_state <=#Tp 1'b0;
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tx_state <=#Tp 1'b0;
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else if (go_tx)
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else if (go_tx)
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tx_state <=#Tp 1'b1;
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tx_state <=#Tp 1'b1;
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end
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end
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| Line 1645... |
Line 1678... |
begin
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begin
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if (rst)
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if (rst)
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transmitting <= 1'b0;
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transmitting <= 1'b0;
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else if (go_error_frame | go_overload_frame | go_tx)
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else if (go_error_frame | go_overload_frame | go_tx)
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transmitting <=#Tp 1'b1;
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transmitting <=#Tp 1'b1;
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else if (reset_mode | go_rx_idle | (go_rx_id1 & (~tx_state)) | (priority_lost & tx_state))
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else if (reset_mode | go_rx_idle | (go_rx_id1 & (~tx_state)) | (arbitration_lost & tx_state))
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transmitting <=#Tp 1'b0;
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transmitting <=#Tp 1'b0;
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end
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end
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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| Line 1699... |
Line 1732... |
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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begin
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begin
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if (rst)
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if (rst)
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priority_lost <= 1'b0;
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arbitration_lost <= 1'b0;
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else if (go_rx_idle | error_frame | reset_mode)
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else if (go_rx_idle | error_frame | reset_mode)
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priority_lost <=#Tp 1'b0;
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arbitration_lost <=#Tp 1'b0;
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else if (tx_state & sample_point & tx & arbitration_field)
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else if (tx_state & sample_point & tx & arbitration_field)
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priority_lost <=#Tp (~sampled_bit);
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arbitration_lost <=#Tp (~sampled_bit);
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end
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always @ (posedge clk)
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begin
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arbitration_lost_q <=#Tp arbitration_lost;
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end
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assign set_arbitration_lost_irq = arbitration_lost & (~arbitration_lost_q) & (~arbitration_blocked);
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always @ (posedge clk or posedge rst)
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begin
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if (rst)
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arbitration_cnt_en <= 1'b0;
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else if (arbitration_blocked)
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arbitration_cnt_en <=#Tp 1'b0;
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else if (rx_id1 & sample_point & (~arbitration_blocked))
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arbitration_cnt_en <=#Tp 1'b1;
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end
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always @ (posedge clk or posedge rst)
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begin
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if (rst)
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arbitration_blocked <= 1'b0;
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else if (read_arbitration_lost_capture_reg)
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arbitration_blocked <=#Tp 1'b0;
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else if (set_arbitration_lost_irq)
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arbitration_blocked <=#Tp 1'b1;
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end
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always @ (posedge clk or posedge rst)
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begin
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if (rst)
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arbitration_lost_capture <= 5'h0;
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else if (read_arbitration_lost_capture_reg)
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arbitration_lost_capture <=#Tp 5'h0;
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else if (sample_point & (~arbitration_blocked) & arbitration_cnt_en & (~bit_de_stuff))
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arbitration_lost_capture <=#Tp arbitration_lost_capture + 1'b1;
|
end
|
end
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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| Line 1863... |
Line 1939... |
((rx_err_cnt >= 96) | (tx_err_cnt >= 96)) ;
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((rx_err_cnt >= 96) | (tx_err_cnt >= 96)) ;
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assign transmit_status = transmitting | (extended_mode & waiting_for_bus_free);
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assign transmit_status = transmitting | (extended_mode & waiting_for_bus_free);
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assign receive_status = (~rx_idle) & (~transmitting) | (extended_mode & waiting_for_bus_free);
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assign receive_status = (~rx_idle) & (~transmitting) | (extended_mode & waiting_for_bus_free);
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/* Error code capture register */
|
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always @ (posedge clk or posedge rst)
|
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begin
|
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if (rst)
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error_capture_code <= 8'h0;
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else if (read_error_code_capture_reg)
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error_capture_code <=#Tp 8'h0;
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else if (set_bus_error_irq)
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error_capture_code <=#Tp {error_capture_code_type[7:6], error_capture_code_direction, error_capture_code_segment[4:0]};
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end
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assign error_capture_code_segment[0] = rx_idle | rx_ide | (rx_id2 & (bit_cnt<13)) | rx_r1 | rx_r0 | rx_dlc | rx_ack | rx_ack_lim | error_frame & node_error_active;
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assign error_capture_code_segment[1] = rx_idle | rx_id1 | rx_id2 | rx_dlc | rx_data | rx_ack_lim | rx_eof | rx_inter | error_frame & node_error_passive;
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assign error_capture_code_segment[2] = (rx_id1 & (bit_cnt>7)) | rx_rtr1 | rx_ide | rx_id2 | rx_rtr2 | rx_r1 | error_frame & node_error_passive | overload_frame;
|
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assign error_capture_code_segment[3] = (rx_id2 & (bit_cnt>4)) | rx_rtr2 | rx_r1 | rx_r0 | rx_dlc | rx_data | rx_crc | rx_crc_lim | rx_ack | rx_ack_lim | rx_eof | overload_frame;
|
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assign error_capture_code_segment[4] = rx_crc_lim | rx_ack | rx_ack_lim | rx_eof | rx_inter | error_frame | overload_frame;
|
|
assign error_capture_code_direction = ~transmitting;
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|
|
always @ (bit_err or form_err or stuff_err)
|
|
begin
|
|
if (bit_err)
|
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error_capture_code_type[7:6] <= 2'b00;
|
|
else if (form_err)
|
|
error_capture_code_type[7:6] <= 2'b01;
|
|
else if (stuff_err)
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|
error_capture_code_type[7:6] <= 2'b10;
|
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else
|
|
error_capture_code_type[7:6] <= 2'b11;
|
|
end
|
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|
|
assign set_bus_error_irq = go_error_frame & (~error_capture_code_blocked);
|
|
|
|
|
|
always @ (posedge clk or posedge rst)
|
|
begin
|
|
if (rst)
|
|
error_capture_code_blocked <= 1'b0;
|
|
else if (read_error_code_capture_reg)
|
|
error_capture_code_blocked <=#Tp 1'b0;
|
|
else if (set_bus_error_irq)
|
|
error_capture_code_blocked <=#Tp 1'b1;
|
|
end
|
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|
|
|
endmodule
|
endmodule
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No newline at end of file
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No newline at end of file
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