| Line 48... |
Line 48... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.28 2003/03/01 22:53:33 mohor
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// Actel APA ram supported.
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//
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// Revision 1.27 2003/02/20 00:26:02 mohor
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// Revision 1.27 2003/02/20 00:26:02 mohor
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// When a dominant bit was detected at the third bit of the intermission and
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// When a dominant bit was detected at the third bit of the intermission and
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// node had a message to transmit, bit_stuff error could occur. Fixed.
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// node had a message to transmit, bit_stuff error could occur. Fixed.
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//
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//
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// Revision 1.26 2003/02/19 23:21:54 mohor
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// Revision 1.26 2003/02/19 23:21:54 mohor
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| Line 160... |
Line 163... |
sample_point,
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sample_point,
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sampled_bit,
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sampled_bit,
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sampled_bit_q,
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sampled_bit_q,
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tx_point,
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tx_point,
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hard_sync,
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hard_sync,
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go_seg1,
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addr,
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addr,
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data_in,
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data_in,
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data_out,
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data_out,
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fifo_selected,
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fifo_selected,
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| Line 202... |
Line 206... |
/* Clock Divider register */
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/* Clock Divider register */
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extended_mode,
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extended_mode,
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rx_idle,
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rx_idle,
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transmitting,
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transmitting,
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overjump_sync_seg,
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last_bit_of_inter,
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last_bit_of_inter,
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set_reset_mode,
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set_reset_mode,
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node_bus_off,
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node_bus_off,
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error_status,
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error_status,
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rx_err_cnt,
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rx_err_cnt,
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| Line 274... |
Line 279... |
input sample_point;
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input sample_point;
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input sampled_bit;
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input sampled_bit;
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input sampled_bit_q;
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input sampled_bit_q;
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input tx_point;
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input tx_point;
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input hard_sync;
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input hard_sync;
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input go_seg1;
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input [7:0] addr;
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input [7:0] addr;
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input [7:0] data_in;
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input [7:0] data_in;
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output [7:0] data_out;
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output [7:0] data_out;
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input fifo_selected;
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input fifo_selected;
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| Line 312... |
Line 318... |
/* Tx Error Counter register */
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/* Tx Error Counter register */
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input we_tx_err_cnt;
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input we_tx_err_cnt;
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output rx_idle;
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output rx_idle;
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output transmitting;
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output transmitting;
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output overjump_sync_seg;
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output last_bit_of_inter;
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output last_bit_of_inter;
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output set_reset_mode;
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output set_reset_mode;
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output node_bus_off;
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output node_bus_off;
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output error_status;
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output error_status;
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output [8:0] rx_err_cnt;
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output [8:0] rx_err_cnt;
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| Line 418... |
Line 425... |
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reg [2:0] eof_cnt;
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reg [2:0] eof_cnt;
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reg [2:0] passive_cnt;
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reg [2:0] passive_cnt;
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|
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reg transmitting;
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reg transmitting;
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reg transmitting_q;
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reg overjump_sync_seg;
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|
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reg error_frame;
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reg error_frame;
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reg error_frame_q;
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reg error_frame_q;
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reg enable_error_cnt2;
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reg enable_error_cnt2;
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reg [2:0] error_cnt1;
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reg [2:0] error_cnt1;
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| Line 1700... |
Line 1709... |
|
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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begin
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begin
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if (rst)
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if (rst)
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transmitting_q <= 1'b0;
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else if (go_seg1)
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transmitting_q <=#Tp transmitting;
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end
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|
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|
|
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always @ (posedge clk or posedge rst)
|
|
begin
|
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if (rst)
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overjump_sync_seg <= 1'b0;
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else if (transmitting & (~transmitting_q))
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overjump_sync_seg <=#Tp 1'b1;
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else
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overjump_sync_seg <=#Tp 1'b0;
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end
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|
|
|
|
|
|
|
always @ (posedge clk or posedge rst)
|
|
begin
|
|
if (rst)
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suspend <= 0;
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suspend <= 0;
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else if (reset_mode | (sample_point & (susp_cnt == 7)))
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else if (reset_mode | (sample_point & (susp_cnt == 7)))
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suspend <=#Tp 0;
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suspend <=#Tp 0;
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else if (go_rx_inter & transmitter & node_error_passive)
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else if (go_rx_inter & transmitter & node_error_passive)
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suspend <=#Tp 1'b1;
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suspend <=#Tp 1'b1;
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