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[/] [can/] [tags/] [rel_3/] [rtl/] [verilog/] [can_bsp.v] - Diff between revs 20 and 21

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Rev 20	Rev 21
Line 43...	Line 43...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.12 2003/01/15 21:05:11 mohor`
	`// CRC checking fixed (when bitstuff occurs at the end of a CRC sequence).`
	`//`
`// Revision 1.11 2003/01/15 14:40:23 mohor`	`// Revision 1.11 2003/01/15 14:40:23 mohor`
`// RX state machine fixed to receive "remote request" frames correctly. No data bytes are written to fifo when such frames are received.`	`// RX state machine fixed to receive "remote request" frames correctly. No data bytes are written to fifo when such frames are received.`
`//`	`//`
`// Revision 1.10 2003/01/15 13:16:47 mohor`	`// Revision 1.10 2003/01/15 13:16:47 mohor`
`// When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo.`	`// When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo.`
Line 785...	Line 788...
`begin`	`begin`
`if (rst)`	`if (rst)`
`wr_fifo <= 1'b0;`	`wr_fifo <= 1'b0;`
`else if (reset_wr_fifo)`	`else if (reset_wr_fifo)`
`wr_fifo <=#Tp 1'b0;`	`wr_fifo <=#Tp 1'b0;`
`else if (go_rx_ack_lim & id_ok & no_error) // FIX go_rx_ack_lim`	`else if (go_rx_idle & id_ok & no_error)`
`wr_fifo <=#Tp 1'b1;`	`wr_fifo <=#Tp 1'b1;`
`end`	`end`


`// Header counter. Header length depends on the mode of operation and frame format.`	`// Header counter. Header length depends on the mode of operation and frame format.`

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[/] [can/] [tags/] [rel_3/] [rtl/] [verilog/] [can_bsp.v] - Diff between revs 20 and 21