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https://opencores.org/ocsvn/can/can/trunk
[/] [can/] [tags/] [rel_6/] [rtl/] [verilog/] [can_bsp.v] - Diff between revs 45 and 48
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| Rev 45 |
Rev 48 |
| Line 48... |
Line 48... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.27 2003/02/20 00:26:02 mohor
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// When a dominant bit was detected at the third bit of the intermission and
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// node had a message to transmit, bit_stuff error could occur. Fixed.
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//
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// Revision 1.26 2003/02/19 23:21:54 mohor
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// Revision 1.26 2003/02/19 23:21:54 mohor
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// When bit error occured while active error flag was transmitted, counter was
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// When bit error occured while active error flag was transmitted, counter was
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// not incremented.
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// not incremented.
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//
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//
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// Revision 1.25 2003/02/19 14:44:03 mohor
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// Revision 1.25 2003/02/19 14:44:03 mohor
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| Line 160... |
Line 164... |
hard_sync,
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hard_sync,
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addr,
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addr,
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data_in,
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data_in,
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data_out,
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data_out,
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fifo_selected,
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/* Mode register */
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/* Mode register */
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reset_mode,
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reset_mode,
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| Line 272... |
Line 277... |
input tx_point;
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input tx_point;
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input hard_sync;
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input hard_sync;
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input [7:0] addr;
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input [7:0] addr;
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input [7:0] data_in;
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input [7:0] data_in;
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output [7:0] data_out;
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output [7:0] data_out;
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input fifo_selected;
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input reset_mode;
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input reset_mode;
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input listen_only_mode;
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input listen_only_mode;
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input acceptance_filter_mode;
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input acceptance_filter_mode;
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| Line 1317... |
Line 1323... |
.wr(wr_fifo),
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.wr(wr_fifo),
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.data_in(data_for_fifo),
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.data_in(data_for_fifo),
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.addr(addr),
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.addr(addr),
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.data_out(data_out),
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.data_out(data_out),
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.fifo_selected(fifo_selected),
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.reset_mode(reset_mode),
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.reset_mode(reset_mode),
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.release_buffer(release_buffer),
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.release_buffer(release_buffer),
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.extended_mode(extended_mode),
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.extended_mode(extended_mode),
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.overrun(overrun),
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.overrun(overrun),
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