| Line 48... |
Line 48... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.47 2004/02/08 14:24:10 mohor
|
|
// Error counters changed.
|
|
//
|
// Revision 1.46 2003/10/17 05:55:20 markom
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// Revision 1.46 2003/10/17 05:55:20 markom
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// mbist signals updated according to newest convention
|
// mbist signals updated according to newest convention
|
//
|
//
|
// Revision 1.45 2003/09/30 21:14:33 mohor
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// Revision 1.45 2003/09/30 21:14:33 mohor
|
// Error counters changed.
|
// Error counters changed.
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| Line 372... |
Line 375... |
input abort_tx;
|
input abort_tx;
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input self_rx_request;
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input self_rx_request;
|
input single_shot_transmission;
|
input single_shot_transmission;
|
output tx_state;
|
output tx_state;
|
output tx_state_q;
|
output tx_state_q;
|
input overload_request;
|
input overload_request; // When receiver is busy, it needs to send overload frame. Only 2 overload frames are allowed to
|
output overload_frame; // When receiver is busy, it needs to send overload frame. Only 2 overload frames are allowed to
|
output overload_frame; // be send in a row. This is not implemented, yet, because host can not send an overload request.
|
// be send in a row. This is not implemented, yet, because host can not send an overload request.
|
|
|
|
/* Arbitration Lost Capture Register */
|
/* Arbitration Lost Capture Register */
|
input read_arbitration_lost_capture_reg;
|
input read_arbitration_lost_capture_reg;
|
|
|
/* Error Code Capture Register */
|
/* Error Code Capture Register */
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| Line 577... |
Line 579... |
reg error_flag_over_latched;
|
reg error_flag_over_latched;
|
|
|
reg [7:0] error_capture_code;
|
reg [7:0] error_capture_code;
|
reg [7:6] error_capture_code_type;
|
reg [7:6] error_capture_code_type;
|
reg error_capture_code_blocked;
|
reg error_capture_code_blocked;
|
|
reg tx_next;
|
|
reg first_compare_bit;
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|
|
|
|
wire [4:0] error_capture_code_segment;
|
wire [4:0] error_capture_code_segment;
|
wire error_capture_code_direction;
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wire error_capture_code_direction;
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|
|
wire bit_de_stuff;
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wire bit_de_stuff;
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| Line 1152... |
Line 1157... |
|
|
|
|
// Conditions for form error
|
// Conditions for form error
|
assign form_err = sample_point & ( ((~bit_de_stuff) & rx_crc_lim & (~sampled_bit) ) |
|
assign form_err = sample_point & ( ((~bit_de_stuff) & rx_crc_lim & (~sampled_bit) ) |
|
( rx_ack_lim & (~sampled_bit) ) |
|
( rx_ack_lim & (~sampled_bit) ) |
|
// ((eof_cnt < 3'd6)& rx_eof & (~sampled_bit) & (~tx_state) ) |
|
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// ( & rx_eof & (~sampled_bit) & tx_state )
|
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// ((eof_cnt < 3'd6)& rx_eof & (~sampled_bit) & (~tx_state) )
|
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((eof_cnt < 3'd6)& rx_eof & (~sampled_bit) & (~transmitter) ) |
|
((eof_cnt < 3'd6)& rx_eof & (~sampled_bit) & (~transmitter) ) |
|
( & rx_eof & (~sampled_bit) & transmitter )
|
( & rx_eof & (~sampled_bit) & transmitter )
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);
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);
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|
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| Line 1378... |
Line 1380... |
6'b1_1_1_010 : data_for_fifo = id[20:13]; // extended mode, extended format header
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6'b1_1_1_010 : data_for_fifo = id[20:13]; // extended mode, extended format header
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6'b1_1_1_011 : data_for_fifo = id[12:5]; // extended mode, extended format header
|
6'b1_1_1_011 : data_for_fifo = id[12:5]; // extended mode, extended format header
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6'b1_1_1_100 : data_for_fifo = {id[4:0], 3'h0}; // extended mode, extended format header
|
6'b1_1_1_100 : data_for_fifo = {id[4:0], 3'h0}; // extended mode, extended format header
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6'b1_1_0_000 : data_for_fifo = {1'b0, rtr1, 2'h0, data_len}; // extended mode, standard format header
|
6'b1_1_0_000 : data_for_fifo = {1'b0, rtr1, 2'h0, data_len}; // extended mode, standard format header
|
6'b1_1_0_001 : data_for_fifo = id[10:3]; // extended mode, standard format header
|
6'b1_1_0_001 : data_for_fifo = id[10:3]; // extended mode, standard format header
|
6'b1_1_0_010 : data_for_fifo = {id[2:0], 5'h0}; // extended mode, standard format header
|
6'b1_1_0_010 : data_for_fifo = {id[2:0], rtr1, 4'h0}; // extended mode, standard format header
|
6'b1_0_x_000 : data_for_fifo = id[10:3]; // normal mode header
|
6'b1_0_x_000 : data_for_fifo = id[10:3]; // normal mode header
|
6'b1_0_x_001 : data_for_fifo = {id[2:0], rtr1, data_len}; // normal mode header
|
6'b1_0_x_001 : data_for_fifo = {id[2:0], rtr1, data_len}; // normal mode header
|
default : data_for_fifo = tmp_fifo[data_cnt - {1'b0, header_len}]; // data
|
default : data_for_fifo = tmp_fifo[data_cnt - {1'b0, header_len}]; // data
|
endcase
|
endcase
|
end
|
end
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| Line 1450... |
Line 1452... |
error_cnt1 <=#Tp error_cnt1 + 1'b1;
|
error_cnt1 <=#Tp error_cnt1 + 1'b1;
|
end
|
end
|
|
|
|
|
|
|
assign error_flag_over = ((~node_error_passive) & sample_point & (error_cnt1 == 3'd7) | node_error_passive & sample_point & (passive_cnt == 3'h5)) & (~enable_error_cnt2);
|
assign error_flag_over = ((~node_error_passive) & sample_point & (error_cnt1 == 3'd7) | node_error_passive & sample_point & (passive_cnt == 3'h6)) & (~enable_error_cnt2);
|
|
|
|
|
always @ (posedge clk or posedge rst)
|
always @ (posedge clk or posedge rst)
|
begin
|
begin
|
if (rst)
|
if (rst)
|
| Line 1501... |
Line 1503... |
|
|
// passive_cnt
|
// passive_cnt
|
always @ (posedge clk or posedge rst)
|
always @ (posedge clk or posedge rst)
|
begin
|
begin
|
if (rst)
|
if (rst)
|
passive_cnt <= 3'h0;
|
passive_cnt <= 3'h1;
|
else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
|
else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame | first_compare_bit)
|
passive_cnt <=#Tp 3'h0;
|
passive_cnt <=#Tp 3'h1;
|
else if (sample_point & (passive_cnt < 3'h5))
|
else if (sample_point & (passive_cnt < 3'h6))
|
begin
|
begin
|
if (error_frame_q & (~enable_error_cnt2) & (sampled_bit == sampled_bit_q))
|
if (error_frame & (~enable_error_cnt2) & (sampled_bit == sampled_bit_q))
|
passive_cnt <=#Tp passive_cnt + 1'b1;
|
passive_cnt <=#Tp passive_cnt + 1'b1;
|
else
|
else
|
passive_cnt <=#Tp 3'h0;
|
passive_cnt <=#Tp 3'h1;
|
end
|
end
|
end
|
end
|
|
|
|
|
|
// When comparing 6 equal bits, first is always equal
|
|
always @ (posedge clk or posedge rst)
|
|
begin
|
|
if (rst)
|
|
first_compare_bit <= 1'b0;
|
|
else if (go_error_frame)
|
|
first_compare_bit <=#Tp 1'b1;
|
|
else if (sample_point)
|
|
first_compare_bit <= 1'b0;
|
|
end
|
|
|
|
|
// Transmitting overload frame.
|
// Transmitting overload frame.
|
always @ (posedge clk or posedge rst)
|
always @ (posedge clk or posedge rst)
|
begin
|
begin
|
if (rst)
|
if (rst)
|
| Line 1588... |
Line 1601... |
|
|
|
|
assign send_ack = (~tx_state) & rx_ack & (~err) & (~listen_only_mode);
|
assign send_ack = (~tx_state) & rx_ack & (~err) & (~listen_only_mode);
|
|
|
|
|
reg tx_next;
|
|
always @ (reset_mode or node_bus_off or tx_state or bit_de_stuff_tx or tx_bit or tx_q or
|
always @ (reset_mode or node_bus_off or tx_state or go_tx or bit_de_stuff_tx or tx_bit or tx_q or
|
send_ack or go_overload_frame or overload_frame or overload_cnt1 or
|
send_ack or go_overload_frame or overload_frame or overload_cnt1 or
|
go_error_frame or error_frame or error_cnt1 or node_error_passive)
|
go_error_frame or error_frame or error_cnt1 or node_error_passive)
|
begin
|
begin
|
if (reset_mode | node_bus_off) // Reset or node_bus_off
|
if (reset_mode | node_bus_off) // Reset or node_bus_off
|
tx_next = 1'b1;
|
tx_next = 1'b1;
|
| Line 1616... |
Line 1629... |
if (overload_cnt1 < 3'd6)
|
if (overload_cnt1 < 3'd6)
|
tx_next = 1'b0;
|
tx_next = 1'b0;
|
else
|
else
|
tx_next = 1'b1;
|
tx_next = 1'b1;
|
end
|
end
|
else if (tx_state) // Transmitting message
|
else if (go_tx | tx_state) // Transmitting message
|
tx_next = ((~bit_de_stuff_tx) & tx_bit) | (bit_de_stuff_tx & (~tx_q));
|
tx_next = ((~bit_de_stuff_tx) & tx_bit) | (bit_de_stuff_tx & (~tx_q));
|
else if (send_ack) // Acknowledge
|
else if (send_ack) // Acknowledge
|
tx_next = 1'b0;
|
tx_next = 1'b0;
|
else
|
else
|
tx_next = 1'b1;
|
tx_next = 1'b1;
|
| Line 1738... |
Line 1751... |
begin
|
begin
|
if (rst)
|
if (rst)
|
tx_pointer <= 6'h0;
|
tx_pointer <= 6'h0;
|
else if (rst_tx_pointer)
|
else if (rst_tx_pointer)
|
tx_pointer <=#Tp 6'h0;
|
tx_pointer <=#Tp 6'h0;
|
else if (go_early_tx | (tx_point & tx_state & (~bit_de_stuff_tx)))
|
else if (go_early_tx | (tx_point & (tx_state | go_tx) & (~bit_de_stuff_tx)))
|
tx_pointer <=#Tp tx_pointer + 1'b1;
|
tx_pointer <=#Tp tx_pointer + 1'b1;
|
end
|
end
|
|
|
|
|
assign tx_successful = transmitter & go_rx_inter & (~go_error_frame) & (~error_frame_ended) & (~overload_frame_ended) & (~arbitration_lost);
|
assign tx_successful = transmitter & go_rx_inter & (~go_error_frame) & (~error_frame_ended) & (~overload_frame_ended) & (~arbitration_lost);
|
| Line 1758... |
Line 1771... |
need_to_tx <=#Tp 1'b1;
|
need_to_tx <=#Tp 1'b1;
|
end
|
end
|
|
|
|
|
|
|
assign go_early_tx = (~listen_only_mode) & need_to_tx & (~tx_state) & (~suspend) & sample_point & (~sampled_bit) & (rx_idle | last_bit_of_inter);
|
assign go_early_tx = (~listen_only_mode) & need_to_tx & (~tx_state) & (~suspend | (susp_cnt == 3'h7)) & sample_point & (~sampled_bit) & (rx_idle | last_bit_of_inter);
|
assign go_tx = (~listen_only_mode) & need_to_tx & (~tx_state) & (~suspend) & (go_early_tx | rx_idle);
|
assign go_tx = (~listen_only_mode) & need_to_tx & (~tx_state) & (~suspend | (sample_point & (susp_cnt == 3'h7))) & (go_early_tx | rx_idle);
|
|
|
|
|
// go_early_tx latched (for proper bit_de_stuff generation)
|
// go_early_tx latched (for proper bit_de_stuff generation)
|
always @ (posedge clk or posedge rst)
|
always @ (posedge clk or posedge rst)
|
begin
|
begin
|
if (rst)
|
if (rst)
|
| Line 1803... |
Line 1815... |
begin
|
begin
|
if (rst)
|
if (rst)
|
transmitter <= 1'b0;
|
transmitter <= 1'b0;
|
else if (go_tx)
|
else if (go_tx)
|
transmitter <=#Tp 1'b1;
|
transmitter <=#Tp 1'b1;
|
else if (reset_mode | go_rx_idle)
|
else if (reset_mode | go_rx_idle | suspend & go_rx_id1)
|
transmitter <=#Tp 1'b0;
|
transmitter <=#Tp 1'b0;
|
end
|
end
|
|
|
|
|
|
|
| Line 1817... |
Line 1829... |
begin
|
begin
|
if (rst)
|
if (rst)
|
transmitting <= 1'b0;
|
transmitting <= 1'b0;
|
else if (go_error_frame | go_overload_frame | go_tx | send_ack)
|
else if (go_error_frame | go_overload_frame | go_tx | send_ack)
|
transmitting <=#Tp 1'b1;
|
transmitting <=#Tp 1'b1;
|
else if (reset_mode | go_rx_idle | (go_rx_id1 & (~tx_state)) | (arbitration_lost & tx_state) | rx_ack_lim)
|
else if (reset_mode | go_rx_idle | (go_rx_id1 & (~tx_state)) | (arbitration_lost & tx_state))
|
transmitting <=#Tp 1'b0;
|
transmitting <=#Tp 1'b0;
|
end
|
end
|
|
|
|
|
always @ (posedge clk or posedge rst)
|
always @ (posedge clk or posedge rst)
|
| Line 1855... |
Line 1867... |
else if (susp_cnt_en & sample_point)
|
else if (susp_cnt_en & sample_point)
|
susp_cnt <=#Tp susp_cnt + 1'b1;
|
susp_cnt <=#Tp susp_cnt + 1'b1;
|
end
|
end
|
|
|
|
|
|
|
|
|
always @ (posedge clk or posedge rst)
|
always @ (posedge clk or posedge rst)
|
begin
|
begin
|
if (rst)
|
if (rst)
|
finish_msg <= 1'b0;
|
finish_msg <= 1'b0;
|
else if (go_rx_idle | go_rx_id1 | error_frame | reset_mode)
|
else if (go_rx_idle | go_rx_id1 | error_frame | reset_mode)
|
| Line 1872... |
Line 1882... |
|
|
always @ (posedge clk or posedge rst)
|
always @ (posedge clk or posedge rst)
|
begin
|
begin
|
if (rst)
|
if (rst)
|
arbitration_lost <= 1'b0;
|
arbitration_lost <= 1'b0;
|
// else if (go_rx_idle | error_frame | reset_mode)
|
|
else if (go_rx_idle | error_frame_ended | reset_mode)
|
else if (go_rx_idle | error_frame_ended | reset_mode)
|
arbitration_lost <=#Tp 1'b0;
|
arbitration_lost <=#Tp 1'b0;
|
// else if (tx_state & sample_point & tx & arbitration_field)
|
|
else if (transmitter & sample_point & tx & arbitration_field)
|
else if (transmitter & sample_point & tx & arbitration_field)
|
arbitration_lost <=#Tp (~sampled_bit);
|
arbitration_lost <=#Tp (~sampled_bit);
|
end
|
end
|
|
|
|
|
| Line 1938... |
Line 1946... |
rx_err_cnt <=#Tp {1'b0, data_in};
|
rx_err_cnt <=#Tp {1'b0, data_in};
|
else if (set_reset_mode)
|
else if (set_reset_mode)
|
rx_err_cnt <=#Tp 9'h0;
|
rx_err_cnt <=#Tp 9'h0;
|
else
|
else
|
begin
|
begin
|
// if ((~listen_only_mode) & (~transmitter | arbitration_lost | suspend))
|
|
if ((~listen_only_mode) & (~transmitter | arbitration_lost))
|
if ((~listen_only_mode) & (~transmitter | arbitration_lost))
|
begin
|
begin
|
if (go_rx_ack_lim & (~go_error_frame) & (~crc_err) & (rx_err_cnt > 9'h0))
|
if (go_rx_ack_lim & (~go_error_frame) & (~crc_err) & (rx_err_cnt > 9'h0))
|
begin
|
begin
|
if (rx_err_cnt > 9'd127)
|
if (rx_err_cnt > 9'd127)
|
| Line 1952... |
Line 1959... |
end
|
end
|
else if (rx_err_cnt < 9'd128)
|
else if (rx_err_cnt < 9'd128)
|
begin
|
begin
|
if (go_error_frame & (~rule5)) // 1 (rule 5 is just the opposite then rule 1 exception
|
if (go_error_frame & (~rule5)) // 1 (rule 5 is just the opposite then rule 1 exception
|
rx_err_cnt <=#Tp rx_err_cnt + 1'b1;
|
rx_err_cnt <=#Tp rx_err_cnt + 1'b1;
|
// else if ( (error_flag_over & (~error_flag_over_latched) & sample_point & (~sampled_bit) & (error_cnt1 == 3'd7) & (~rx_err_cnt_blocked) ) | // 2
|
|
// else if ( (error_flag_over & (~error_flag_over_latched) & sample_point & (~sampled_bit) & (error_cnt1 == 3'd7) ) | // 2
|
|
else if ( (error_flag_over & (~error_flag_over_latched) & sample_point & (~sampled_bit) & (error_cnt1 == 3'd7) ) | // 2
|
else if ( (error_flag_over & (~error_flag_over_latched) & sample_point & (~sampled_bit) & (error_cnt1 == 3'd7) ) | // 2
|
(go_error_frame & rule5 ) | // 5
|
(go_error_frame & rule5 ) | // 5
|
(sample_point & (~sampled_bit) & (delayed_dominant_cnt == 3'h7) ) // 6
|
(sample_point & (~sampled_bit) & (delayed_dominant_cnt == 3'h7) ) // 6
|
)
|
)
|
rx_err_cnt <=#Tp rx_err_cnt + 4'h8;
|
rx_err_cnt <=#Tp rx_err_cnt + 4'h8;
|
| Line 1974... |
Line 1979... |
else if (we_tx_err_cnt)
|
else if (we_tx_err_cnt)
|
tx_err_cnt <=#Tp {1'b0, data_in};
|
tx_err_cnt <=#Tp {1'b0, data_in};
|
else
|
else
|
begin
|
begin
|
if (set_reset_mode)
|
if (set_reset_mode)
|
tx_err_cnt <=#Tp 9'd127;
|
tx_err_cnt <=#Tp 9'd128;
|
else if ((tx_err_cnt > 9'd0) & (tx_successful | bus_free))
|
else if ((tx_err_cnt > 9'd0) & (tx_successful | bus_free))
|
tx_err_cnt <=#Tp tx_err_cnt - 1'h1;
|
tx_err_cnt <=#Tp tx_err_cnt - 1'h1;
|
// else if (transmitter & (~arbitration_lost) & (~suspend))
|
|
else if (transmitter & (~arbitration_lost))
|
else if (transmitter & (~arbitration_lost))
|
begin
|
begin
|
if ( (sample_point & (~sampled_bit) & (delayed_dominant_cnt == 3'h7) ) | // 6
|
if ( (sample_point & (~sampled_bit) & (delayed_dominant_cnt == 3'h7) ) | // 6
|
(go_error_frame & rule5 ) | // 4 (rule 5 is the same as rule 4)
|
(go_error_frame & rule5 ) | // 4 (rule 5 is the same as rule 4)
|
(go_error_frame & (~(transmitter & node_error_passive & ack_err)) & (~(transmitter & stuff_err & arbitration_field & sample_point & tx & (~sampled_bit))) ) | // 3
|
(go_error_frame & (~(transmitter & node_error_passive & ack_err)) & (~(transmitter & stuff_err &
|
(error_frame & rule3_exc1_2 ) //| // 3
|
arbitration_field & sample_point & tx & (~sampled_bit))) ) | // 3
|
// (go_error_frame & (~(transmitter & stuff_err & arbitration_field & sample_point & tx & (~sampled_bit))) ) //
|
(error_frame & rule3_exc1_2 ) // 3
|
)
|
)
|
tx_err_cnt <=#Tp tx_err_cnt + 4'h8;
|
tx_err_cnt <=#Tp tx_err_cnt + 4'h8;
|
end
|
end
|
end
|
end
|
end
|
end
|
| Line 2139... |
Line 2143... |
end
|
end
|
|
|
|
|
endmodule
|
endmodule
|
|
|
No newline at end of file
|
No newline at end of file
|
|
|
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|
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|
