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[/] [can/] [trunk/] [rtl/] [verilog/] [can_fifo.v] - Diff between revs 115 and 118
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| Rev 115 |
Rev 118 |
| Line 48... |
Line 48... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.21 2003/08/14 16:04:52 simons
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// Artisan ram instances added.
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//
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// Revision 1.20 2003/07/16 14:00:45 mohor
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// Revision 1.20 2003/07/16 14:00:45 mohor
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// Fixed according to the linter.
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// Fixed according to the linter.
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//
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//
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// Revision 1.19 2003/07/03 09:30:44 mohor
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// Revision 1.19 2003/07/03 09:30:44 mohor
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// PCI_BIST replaced with CAN_BIST.
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// PCI_BIST replaced with CAN_BIST.
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| Line 611... |
Line 614... |
.AB (wr_pointer),
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.AB (wr_pointer),
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.DA (8'h00),
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.DA (8'h00),
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.DB (data_in),
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.DB (data_in),
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.QA (data_out),
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.QA (data_out),
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.QB (),
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.QB (),
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.RENA (~fifo_selected),
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.OENA (~fifo_selected),
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.RENB (1'b1),
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.OENB (1'b1),
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.WENA (1'b1),
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.WENA (1'b1),
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.WENB (~(wr & (~fifo_full))),
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.WENB (~(wr & (~fifo_full)))
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);
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);
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art_hsdp_64x4 info_fifo
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art_hsdp_64x4 info_fifo
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(
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(
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.CENA (1'b0),
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.CENA (1'b0),
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.CENB (1'b0),
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.CENB (1'b0),
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| Line 628... |
Line 631... |
.AB (wr_info_pointer),
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.AB (wr_info_pointer),
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.DA (4'h0),
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.DA (4'h0),
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.DB (len_cnt & {4{~initialize_memories}}),
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.DB (len_cnt & {4{~initialize_memories}}),
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.QA (length_info),
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.QA (length_info),
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.QB (),
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.QB (),
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.RENA (1'b0),
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.OENA (1'b0),
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.RENB (1'b1),
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.OENB (1'b1),
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.WENB (),
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.WENA (1'b1),
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.WENB (~(write_length_info & (~info_full) | initialize_memories))
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.WENB (~(write_length_info & (~info_full) | initialize_memories))
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);
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);
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`endif
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`endif
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// overrun_info
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// overrun_info
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