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[/] [can/] [trunk/] [rtl/] [verilog/] [can_fifo.v] - Diff between revs 152 and 155
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Rev 152 |
Rev 155 |
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Line 48... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.27 2004/11/18 12:39:34 igorm
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// Fixes for compatibility after the SW reset.
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//
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// Revision 1.26 2004/02/08 14:30:57 mohor
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// Revision 1.26 2004/02/08 14:30:57 mohor
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// Header changed.
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// Header changed.
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//
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//
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// Revision 1.25 2003/10/23 16:52:17 mohor
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// Revision 1.25 2003/10/23 16:52:17 mohor
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// Active high/low problem when Altera devices are used. Bug fixed by
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// Active high/low problem when Altera devices are used. Bug fixed by
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// rd_info_pointer
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// rd_info_pointer
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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begin
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begin
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if (rst)
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if (rst)
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rd_info_pointer <= 6'h0;
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rd_info_pointer <= 6'h0;
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else if (release_buffer & (~fifo_empty))
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else if (release_buffer & (~info_full))
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rd_info_pointer <=#Tp rd_info_pointer + 1'b1;
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rd_info_pointer <=#Tp rd_info_pointer + 1'b1;
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end
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end
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// rd_pointer
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// rd_pointer
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