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[/] [can/] [trunk/] [rtl/] [verilog/] [can_fifo.v] - Diff between revs 95 and 97
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| Rev 95 |
Rev 97 |
| Line 48... |
Line 48... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.17 2003/06/27 20:56:15 simons
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// Virtual silicon ram instances added.
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//
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// Revision 1.16 2003/06/18 23:03:44 mohor
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// Revision 1.16 2003/06/18 23:03:44 mohor
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// Typo fixed.
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// Typo fixed.
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//
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//
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// Revision 1.15 2003/06/11 09:37:05 mohor
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// Revision 1.15 2003/06/11 09:37:05 mohor
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// overrun and length_info fifos are initialized at the end of reset.
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// overrun and length_info fifos are initialized at the end of reset.
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| Line 163... |
Line 166... |
input scanb_clk;
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input scanb_clk;
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input scanb_si;
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input scanb_si;
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output scanb_so;
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output scanb_so;
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input scanb_en;
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input scanb_en;
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wire scanb_s_0;
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wire scanb_s_0;
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wire scanb_s_1;
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`endif
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`endif
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`ifdef ACTEL_APA_RAM
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`ifdef ACTEL_APA_RAM
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`else
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`else
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`ifdef XILINX_RAM
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`ifdef XILINX_RAM
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`else
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`else
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`ifdef VIRTUALSILICON_RAM
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`ifdef VIRTUALSILICON_RAM
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reg overrun_info[0:63];
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`else
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`else
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reg [7:0] fifo [0:63];
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reg [7:0] fifo [0:63];
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reg [3:0] length_fifo[0:63];
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reg [3:0] length_fifo[0:63];
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reg overrun_info[0:63];
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reg overrun_info[0:63];
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`endif
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`endif
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| Line 532... |
Line 535... |
,
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,
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// debug chain signals
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// debug chain signals
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.scanb_rst (scanb_rst),
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.scanb_rst (scanb_rst),
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.scanb_clk (scanb_clk),
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.scanb_clk (scanb_clk),
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.scanb_si (scanb_s_0),
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.scanb_si (scanb_s_0),
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.scanb_so (scanb_s_1),
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.scanb_en (scanb_en)
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`endif
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);
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`ifdef PCI_BIST
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vs_hdtp_64x1_bist overrun_fifo
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`else
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vs_hdtp_64x1 overrun_fifo
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`endif
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(
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.RCK (clk),
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.WCK (clk),
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.RADR (rd_info_pointer),
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.WADR (wr_info_pointer),
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.DI ((latch_overrun | (wr & fifo_full)) & (~initialize_memories)),
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.DOUT (overrun),
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.REN (1'b0),
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.WEN (~(write_length_info & (~info_full) | initialize_memories))
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`ifdef PCI_BIST
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,
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// debug chain signals
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.scanb_rst (scanb_rst),
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.scanb_clk (scanb_clk),
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.scanb_si (scanb_s_1),
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.scanb_so (scanb_so),
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.scanb_so (scanb_so),
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.scanb_en (scanb_en)
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.scanb_en (scanb_en)
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`endif
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`endif
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);
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);
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// overrun_info
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always @ (posedge clk)
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begin
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if (write_length_info & (~info_full) | initialize_memories)
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overrun_info[wr_info_pointer] <=#Tp (latch_overrun | (wr & fifo_full)) & (~initialize_memories);
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end
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// reading overrun
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assign overrun = overrun_info[rd_info_pointer];
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`else
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`else
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// writing data to fifo
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// writing data to fifo
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always @ (posedge clk)
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always @ (posedge clk)
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begin
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begin
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if (wr & (~fifo_full))
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if (wr & (~fifo_full))
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