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[/] [can/] [trunk/] [rtl/] [verilog/] [can_fifo.v] - Diff between revs 97 and 99
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| Rev 97 |
Rev 99 |
| Line 48... |
Line 48... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.18 2003/06/27 22:14:23 simons
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// Overrun fifo implemented with FFs, because it is not possible to create such a memory.
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//
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// Revision 1.17 2003/06/27 20:56:15 simons
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// Revision 1.17 2003/06/27 20:56:15 simons
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// Virtual silicon ram instances added.
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// Virtual silicon ram instances added.
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//
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//
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// Revision 1.16 2003/06/18 23:03:44 mohor
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// Revision 1.16 2003/06/18 23:03:44 mohor
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// Typo fixed.
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// Typo fixed.
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| Line 490... |
Line 493... |
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`else
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`else
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`ifdef VIRTUALSILICON_RAM
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`ifdef VIRTUALSILICON_RAM
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`ifdef PCI_BIST
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`ifdef CAN_BIST
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vs_hdtp_64x8_bist fifo
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vs_hdtp_64x8_bist fifo
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`else
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`else
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vs_hdtp_64x8 fifo
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vs_hdtp_64x8 fifo
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`endif
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`endif
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(
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(
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| Line 504... |
Line 507... |
.WADR (wr_pointer),
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.WADR (wr_pointer),
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.DI (data_in),
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.DI (data_in),
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.DOUT (data_out),
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.DOUT (data_out),
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.REN (~fifo_selected),
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.REN (~fifo_selected),
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.WEN (~(wr & (~fifo_full)))
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.WEN (~(wr & (~fifo_full)))
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`ifdef PCI_BIST
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`ifdef CAN_BIST
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,
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,
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// debug chain signals
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// debug chain signals
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.scanb_rst (scanb_rst),
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.scanb_rst (scanb_rst),
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.scanb_clk (scanb_clk),
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.scanb_clk (scanb_clk),
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.scanb_si (scanb_si),
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.scanb_si (scanb_si),
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.scanb_so (scanb_s_0),
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.scanb_so (scanb_s_0),
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.scanb_en (scanb_en)
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.scanb_en (scanb_en)
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`endif
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`endif
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);
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);
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`ifdef PCI_BIST
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`ifdef CAN_BIST
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vs_hdtp_64x4_bist info_fifo
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vs_hdtp_64x4_bist info_fifo
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`else
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`else
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vs_hdtp_64x4 info_fifo
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vs_hdtp_64x4 info_fifo
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`endif
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`endif
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(
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(
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| Line 529... |
Line 532... |
.WADR (wr_info_pointer),
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.WADR (wr_info_pointer),
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.DI (len_cnt & {4{~initialize_memories}}),
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.DI (len_cnt & {4{~initialize_memories}}),
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.DOUT (length_info),
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.DOUT (length_info),
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.REN (1'b0),
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.REN (1'b0),
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.WEN (~(write_length_info & (~info_full) | initialize_memories))
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.WEN (~(write_length_info & (~info_full) | initialize_memories))
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`ifdef PCI_BIST
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`ifdef CAN_BIST
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,
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,
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// debug chain signals
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// debug chain signals
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.scanb_rst (scanb_rst),
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.scanb_rst (scanb_rst),
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.scanb_clk (scanb_clk),
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.scanb_clk (scanb_clk),
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.scanb_si (scanb_s_0),
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.scanb_si (scanb_s_0),
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