URL
https://opencores.org/ocsvn/can/can/trunk
[/] [can/] [trunk/] [sim/] [rtl_sim/] [run/] [run_sim.scr] - Diff between revs 119 and 141
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 119 |
Rev 141 |
Line 31... |
Line 31... |
|
|
foreach filename ( `cat ../bin/rtl_file_list` )
|
foreach filename ( `cat ../bin/rtl_file_list` )
|
echo "../../../rtl/verilog/"$filename >> ncvlog.args
|
echo "../../../rtl/verilog/"$filename >> ncvlog.args
|
end
|
end
|
|
|
foreach filename ( `cat ../bin/memory_file_list` )
|
#foreach filename ( `cat ../bin/memory_file_list` )
|
echo "../../../bench/verilog/"$filename >> ncvlog.args
|
# echo "../../../bench/verilog/"$filename >> ncvlog.args
|
end
|
#end
|
|
|
foreach filename ( `cat ../bin/sim_file_list` )
|
foreach filename ( `cat ../bin/sim_file_list` )
|
echo "../../../bench/verilog/"$filename >> ncvlog.args
|
echo "../../../bench/verilog/"$filename >> ncvlog.args
|
end
|
end
|
|
|
echo "../../../../bist/rtl/verilog/bist.v" >> ncvlog.args
|
#echo "../../../../bist/rtl/verilog/bist.v" >> ncvlog.args
|
echo "../../../../bist/rtl/verilog/bist_dp_top.v" >> ncvlog.args
|
#echo "../../../../bist/rtl/verilog/bist_dp_top.v" >> ncvlog.args
|
echo "../../../../bist/rtl/verilog/bist_sp_top.v" >> ncvlog.args
|
#echo "../../../../bist/rtl/verilog/bist_sp_top.v" >> ncvlog.args
|
echo "../../../../bist/rtl/verilog/bist_tp_top.v" >> ncvlog.args
|
#echo "../../../../bist/rtl/verilog/bist_tp_top.v" >> ncvlog.args
|
|
|
ncvlog -f ncvlog.args
|
ncvlog -f ncvlog.args
|
|
|
echo "-MESSAGES" > ncelab.args
|
echo "-MESSAGES" > ncelab.args
|
echo "-NOCOPYRIGHT" >> ncelab.args
|
echo "-NOCOPYRIGHT" >> ncelab.args
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.