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[/] [connect-6/] [trunk/] [BUILD_SCC/] [scc_scripts/] [run_imp_marks.tcl] - Diff between revs 4 and 7

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set SYNTH_SRC "synth_src"
 
set_project_params -directory ./
set_project_params -directory ./
set_project_params -results myboard.txt
set_project_params -results myboard.txt
set_project_params -sources "${SYNTH_SRC}/connect6.cpp ${SYNTH_SRC}/connect6_synth.cpp ${SYNTH_SRC}/main.cpp ${SYNTH_SRC}/state.cpp ${SYNTH_SRC}/threats.cpp ${SYNTH_SRC}/util.cpp"
set_project_params -sources "synth_src/connect6.cpp synth_src/connect6_synth.cpp synth_src/main.cpp synth_src/q.cpp synth_src/state.cpp synth_src/threats.cpp synth_src/util.cpp"
set_project_params -headers "${SYNTH_SRC}/connect6.h ${SYNTH_SRC}/connect6_synth.h ${SYNTH_SRC}/shared.h ${SYNTH_SRC}/threats.h ${SYNTH_SRC}/util.h"
set_project_params -headers "synth_src/connect6.h synth_src/connect6_synth.h synth_src/q.hpp synth_src/shared.h synth_src/threats.h synth_src/util.h"
 
set_project_params -cache_result_files no
 
set_project_params -cache_data_files yes
 
 
if [file exists imp_marks] { delete_implementation imp_marks }
if [file exists imp_marks] { delete_implementation imp_marks }
create_implementation imp_marks
create_implementation imp_marks
 
 
set_implementation_params -systemc_source no
set_implementation_params -systemc_source no
set_implementation_params -memory_return_path_external_delay 0%
set_implementation_params -memory_return_path_external_delay 0%
set_implementation_params -memory_forward_path_external_delay 0%
set_implementation_params -memory_forward_path_external_delay 0%
set_implementation_params -instream_forward_path_external_delay 0%
set_implementation_params -instream_forward_path_external_delay 0%
set_implementation_params -sccompiler_args "-DDONT_VERIFY_PPAID"
set_implementation_params -sccompiler_args "-DDONT_VERIFY_PPAID -g -g -g -g"
set_implementation_params -outstream_return_path_external_delay 0%
set_implementation_params -outstream_return_path_external_delay 0%
set_implementation_params -appfiles "${SYNTH_SRC}/state.cpp ${SYNTH_SRC}/threats.cpp"
set_implementation_params -appfiles "synth_src/state.cpp synth_src/threats.cpp"
set_implementation_params -proc ai_marks
set_implementation_params -proc ai_marks
set_implementation_params -memory_forward_boundary_register infer
set_implementation_params -memory_forward_boundary_register infer
set_implementation_params -techlib altera-cyclone3
set_implementation_params -cppcompiler_args "-g -DPICO_SYNTH -fpermissive"
 
set_implementation_params -techlib altera-cyclone4gx
 
set_implementation_params -device ep4cgx110c-fc23-7
set_implementation_params -memory_return_boundary_register infer
set_implementation_params -memory_return_boundary_register infer
set_implementation_params -cexec_args "-port /dev/ttyS0 -player L"
set_implementation_params -cexec_args "-port /dev/ttyS0 -player L"
set_implementation_params -host_memory_access never,,,
set_implementation_params -host_memory_access never
set_implementation_params -device ep3c25-ea144-7
set_implementation_params -init_data_registers yes
set_implementation_params -force_independent_stalldomain_tcab yes
 
set_implementation_params -outstream_forward_path_external_delay 0%
set_implementation_params -outstream_forward_path_external_delay 0%
set_implementation_params -build_tcab yes
set_implementation_params -build_tcab yes
set_implementation_params -reset_data_registers yes
set_implementation_params -reset_data_registers yes
set_implementation_params -init_data_registers yes
set_implementation_params -task_overlap 0
set_implementation_params -instream_return_path_external_delay 0%
set_implementation_params -instream_return_path_external_delay 0%
 
set_implementation_params -simulator modelsim
set_implementation_params -clock_freq 100
set_implementation_params -clock_freq 100
#set_implementation_params -user_supplied_fpga_memory_read_write_ports separate
 
#set_implementation_params -internal_blockram_memory_read_write_ports separate
 
 
 
 
 
 
 
 
set_loop_params -ii 3
 
 
csim  -golden  -cexec_args "-port /dev/ttyS0 -player L"
csim  -golden  -cppcompiler_args "-g -DPICO_SYNTH -fpermissive" -cexec_args "-port /dev/ttyS0 -player L"
preprocess
preprocess
csim  -preprocess  -cexec_args "-port /dev/ttyS0 -player L"
csim  -preprocess  -cppcompiler_args "-g -DPICO_SYNTH -fpermissive" -cexec_args "-port /dev/ttyS0 -player L"
schedule
schedule
csim  -schedule  -cexec_args "-port /dev/ttyS0 -player L"
csim  -schedule  -cppcompiler_args "-g -DPICO_SYNTH -fpermissive" -cexec_args "-port /dev/ttyS0 -player L"
synthesize
synthesize
#csim -synthesize -dump_memory_access_trace
 
create_rtl_package
create_rtl_package
 
 
#set_implementation_params -simulator modelsim
 
#vlogsim -offline -dotasks 1-30
 
 
 
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