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https://opencores.org/ocsvn/copyblaze/copyblaze/trunk
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| Rev 2 |
Rev 6 |
| Line 113... |
Line 113... |
WE_O : out std_ulogic;
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WE_O : out std_ulogic;
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SEL_O : out std_ulogic_vector(1 downto 0);
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SEL_O : out std_ulogic_vector(1 downto 0);
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STB_O : out std_ulogic;
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STB_O : out std_ulogic;
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ACK_I : in std_ulogic;
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ACK_I : in std_ulogic;
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CYC_O : out std_ulogic;
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CYC_O : out std_ulogic
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TAGN_O : out std_ulogic_vector(1 downto 0);
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TAGN_I : in std_ulogic_vector(1 downto 0)
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);
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);
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end component;
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end component;
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component WBOPRT08
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component WBOPRT08
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port(
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port(
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| Line 209... |
Line 206... |
Freeze_i => iFreeze,
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Freeze_i => iFreeze,
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- Signaux Wishbone Interface
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-- Signaux Wishbone Interface
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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RST_I => iReset,
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--RST_I => iReset,
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--CLK_I => Clk_i,
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--CLK_I => Clk_i,
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ADR_O => open,
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ADR_O => open,
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DAT_I => iWbDAT_I,--(others => '0'),
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DAT_I => iWbDAT_I,--(others => '0'),
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DAT_O => iWbDAT_O,--open,
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DAT_O => iWbDAT_O,--open,
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WE_O => iWbWE,--open,
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WE_O => iWbWE,--open,
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SEL_O => open,
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SEL_O => open,
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STB_O => iWbSTB,
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STB_O => iWbSTB,
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ACK_I => iWbACK,
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ACK_I => iWbACK,
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CYC_O => open,
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CYC_O => open
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TAGN_O => open,
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TAGN_I => (others => '0')
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);
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);
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WB_port : WBOPRT08
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WB_port : WBOPRT08
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port map
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port map
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(
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(
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