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-- Company:
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--
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-- File: cp_Alu.vhd
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--
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-- Description:
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-- projet copyblaze
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-- Arithmetic, Logic, Shift, Rotate
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--
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-- File history:
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-- v1.0: 07/10/11: Creation
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--
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-- Targeted device: ProAsic A3P250 VQFP100
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-- Author: AbdAllah Meziti
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--------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.Usefull_Pkg.all; -- Usefull Package
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--------------------------------------------------------------------------------
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-- Entity: cp_Alu
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--
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-- Description:
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--
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-- REMARQUE:
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--
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--
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-- History:
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-- 07/10/11 AM: Creation
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-- ---------------------
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-- xx/xx/xx AM:
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--
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--------------------------------------------------------------------------------
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entity cp_Alu is
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generic
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(
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GEN_WIDTH_DATA : positive := 8
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);
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port (
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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OperationSelect_i : in std_ulogic_vector(2 downto 0);
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LogicOper_i : in std_ulogic_vector(1 downto 0);
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ArithOper_i : in std_ulogic_vector(1 downto 0);
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OperandSelect_i : in std_ulogic;
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CY_i : in std_ulogic;
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sX_i : in std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0); --
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sY_i : in std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0); --
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kk_i : in std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0); --
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ShiftBit_i : in std_ulogic_vector( 2 downto 0 );
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ShiftSens_i : in std_ulogic;
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Result_o : out std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0); --
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C_o : out std_ulogic;
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Z_o : out std_ulogic
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);
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end cp_Alu;
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--------------------------------------------------------------------------------
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-- Architecture: RTL
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-- of entity : cp_Alu
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--------------------------------------------------------------------------------
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architecture rtl of cp_Alu is
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--------------------------------------------------------------------------------
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-- Définition des fonctions
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- Définition des constantes
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- Définition des signaux interne
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--------------------------------------------------------------------------------
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signal iOperand1 : std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0);
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signal iOperand2 : std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0);
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signal iOperand1Arith : std_ulogic_vector(GEN_WIDTH_DATA downto 0);
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signal iOperand2Arith : std_ulogic_vector(GEN_WIDTH_DATA downto 0);
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signal iShiftResult : std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0);
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signal iLogicalResult : std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0);
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signal iArithResult : std_ulogic_vector(GEN_WIDTH_DATA downto 0);
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signal iTotalResult : std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0);
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signal iShiftBit : std_ulogic;
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signal iShiftC : std_ulogic;
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signal iLogicC : std_ulogic;
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signal iArithC : std_ulogic;
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signal iArithCin : std_ulogic;
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--------------------------------------------------------------------------------
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-- Déclaration des composants
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--------------------------------------------------------------------------------
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component cp_CLAAdder
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generic
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(
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GEN_WIDTH_DATA : positive := 8
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);
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port (
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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CarryIn_i : in std_ulogic;
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sX_i : in std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0);
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sY_i : in std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0);
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CarryOut_o : out std_ulogic;
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Result_o : out std_ulogic_vector(GEN_WIDTH_DATA-1 downto 0)
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);
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end component;
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begin
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iOperand1 <= sX_i;
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iOperand2 <= sY_i when ( OperandSelect_i = '1' ) else
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kk_i;
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--------------------------------------------------------------------------------
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-- Operation de décalage et rotation
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--------------------------------------------------------------------------------
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with ShiftBit_i select
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iShiftBit <=
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('0') when "110",
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('1') when "111",
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(CY_i) when "000",
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iOperand1(GEN_WIDTH_DATA-1) when "010",
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iOperand1(0) when "100",
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'0' when others;
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with ShiftSens_i select
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iShiftResult <=
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iOperand1(GEN_WIDTH_DATA-2 downto 0) & iShiftBit when '0', -- Left
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iShiftBit & iOperand1(GEN_WIDTH_DATA-1 downto 1) when '1', -- Right
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iOperand1 when others;
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with ShiftSens_i select
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iShiftC <=
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iOperand1(GEN_WIDTH_DATA-1) when '0', -- Left
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iOperand1(0) when '1', -- Right
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'0' when others;
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--------------------------------------------------------------------------------
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-- Operation Logique
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--------------------------------------------------------------------------------
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with LogicOper_i select
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iLogicalResult <=
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iOperand2 when "00",
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iOperand1 and iOperand2 when "01",
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iOperand1 or iOperand2 when "10",
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iOperand1 xor iOperand2 when "11",
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iOperand1 when others;
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iLogicC <= ODD_Func(iLogicalResult);
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--------------------------------------------------------------------------------
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-- Operation Arithmetique
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--------------------------------------------------------------------------------
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-- Instruction | #ADD/SUB | Include CY | Cin
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-- ADD | 0 | 0 | 0
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-- ADDCY | 0 | 1 | CY
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-- SUB | 1 | 0 | 1
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-- SUBCY | 1 | 1 | not CY
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with ArithOper_i select
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iArithCin <=
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('0') when "00", -- ADD
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(CY_i) when "01", -- ADDCY
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('1') when "10", -- SUB
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not(CY_i) when "11", -- SUBCY
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('0') when others;
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iOperand1Arith <= '0' & iOperand1;
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-- A SUB B => A ADD (not(B) + 1)
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iOperand2Arith <= not('0' & iOperand2) when (ArithOper_i(1)='1') else ('0' & iOperand2);
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U_Adder : cp_CLAAdder
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generic map
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(
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GEN_WIDTH_DATA => GEN_WIDTH_DATA+1
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)
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port map(
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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CarryIn_i => iArithCin ,
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sX_i => iOperand1Arith ,
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sY_i => iOperand2Arith ,
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CarryOut_o => open ,
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Result_o => iArithResult
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);
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iArithC <= iArithResult(GEN_WIDTH_DATA);
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--------------------------------------------------------------------------------
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-- Choix de l'operation
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--------------------------------------------------------------------------------
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with OperationSelect_i select
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iTotalResult <=
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iShiftResult when "000",
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iLogicalResult when "001",
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iArithResult(iTotalResult'range) when "010",
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iOperand2 when "011",
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iOperand1 when others;
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--------------------------------------------------------------------------------
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-- Resultats et Flags
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--------------------------------------------------------------------------------
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Result_o <= iTotalResult;
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Z_o <= not ( OR_Func( iTotalResult ) );
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with OperationSelect_i select
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C_o <=
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iShiftC when "000", -- (Shift/Rotate) :
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iLogicC when "001", -- (Test) : Odd parity
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iArithC when others; -- (Add/Sub/Compare) : Carry, Borrow
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end rtl;
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No newline at end of file
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No newline at end of file
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