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-- Company:
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--
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-- File: cp_Flags.vhd
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--
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-- Description:
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-- projet copyblaze
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-- Flags ZERO & CARRY management
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--
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-- File history:
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-- v1.0: 10/10/11: Creation
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--
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-- Targeted device: ProAsic A3P250 VQFP100
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-- Author: AbdAllah Meziti
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--------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.Usefull_Pkg.all; -- Usefull Package
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--------------------------------------------------------------------------------
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-- Entity: cp_Flags
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--
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-- Description:
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--
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-- REMARQUE:
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--
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--
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-- History:
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-- 10/10/11 AM: Creation
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-- ---------------------
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-- xx/xx/xx AM:
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--
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--------------------------------------------------------------------------------
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entity cp_Flags is
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port (
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--------------------------------------------------------------------------------
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-- Signaux Systeme
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--------------------------------------------------------------------------------
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Clk_i : in std_ulogic; -- signal d'horloge générale
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Rst_i_n : in std_ulogic; -- signal de reset générale
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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Z_i : in std_ulogic;
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C_i : in std_ulogic;
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Z_o : out std_ulogic;
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C_o : out std_ulogic;
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Push_i : in std_ulogic;
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Pop_i : in std_ulogic;
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Write_i : in std_ulogic
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);
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end cp_Flags;
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--------------------------------------------------------------------------------
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-- Architecture: RTL
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-- of entity : cp_Flags
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--------------------------------------------------------------------------------
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architecture rtl of cp_Flags is
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--------------------------------------------------------------------------------
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-- Définition des fonctions
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- Définition des constantes
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- Définition des signaux interne
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--------------------------------------------------------------------------------
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signal iZ : std_ulogic; -- flag
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signal iC : std_ulogic; -- flag
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signal iZs : std_ulogic; -- Shadow flag
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signal iCs : std_ulogic; -- Shadow flag
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--------------------------------------------------------------------------------
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-- Déclaration des composants
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--------------------------------------------------------------------------------
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begin
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--------------------------------------------------------------------------------
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-- Process : Flags_Proc
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-- Description: Flags Management
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--------------------------------------------------------------------------------
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Flags_Proc : process(Rst_i_n, Clk_i)
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begin
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if ( Rst_i_n = '0' ) then
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iZ <= '0';
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iC <= '0';
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elsif ( rising_edge(Clk_i) ) then
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if ( Write_i = '1' ) then
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iZ <= Z_i;
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iC <= C_i;
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elsif ( Pop_i = '1' ) then
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iZ <= iZs;
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iC <= iCs;
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end if;
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end if;
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end process Flags_Proc;
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--------------------------------------------------------------------------------
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-- Process : ShadowFlags_Proc
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-- Description: Shadow Flags Management
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--------------------------------------------------------------------------------
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ShadowFlags_Proc : process(Rst_i_n, Clk_i)
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begin
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if ( Rst_i_n = '0' ) then
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iZs <= '0';
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iCs <= '0';
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elsif ( rising_edge(Clk_i) ) then
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if ( Push_i = '1' ) then
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iZs <= iZ;
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iCs <= iC;
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end if;
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end if;
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end process ShadowFlags_Proc;
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Z_o <= iZ;
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C_o <= iC;
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end rtl;
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