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-- Company:
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--
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-- File: cp_ProgramFlowControl.vhd
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--
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-- Description:
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-- projet copyblaze
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-- Program Flow Control management
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--
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-- File history:
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-- v1.0: 10/10/11: Creation
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-- v1.1: 11/10/11: Add Condionnal management
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-- v1.2: 12/10/11: Modification du traitement des conditions de saut
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--
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-- Targeted device: ProAsic A3P250 VQFP100
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-- Author: AbdAllah Meziti
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--------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.Usefull_Pkg.all; -- Usefull Package
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--------------------------------------------------------------------------------
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-- Entity: cp_ProgramFlowControl
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--
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-- Description:
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--
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-- REMARQUE:
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--
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--
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-- History:
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-- 10/10/11 AM: Creation
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-- ---------------------
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-- xx/xx/xx AM:
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--
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--------------------------------------------------------------------------------
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entity cp_ProgramFlowControl is
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generic
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(
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GEN_WIDTH_PC : positive := 8;
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GEN_INT_VECTOR : std_ulogic_vector(11 downto 0) := x"0F0";
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GEN_DEPTH_STACK : positive := 15
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);
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port (
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--------------------------------------------------------------------------------
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-- Signaux Systeme
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--------------------------------------------------------------------------------
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Clk_i : in std_ulogic; -- signal d'horloge générale
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Rst_i_n : in std_ulogic; -- signal de reset générale
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Enable_i : in std_ulogic;
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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aaa_i : in std_ulogic_vector(GEN_WIDTH_PC-1 downto 0); --
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Interrupt_i : in std_ulogic; --
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Jump_i : in std_ulogic;
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Call_i : in std_ulogic;
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Return_i : in std_ulogic;
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ReturnI_i : in std_ulogic;
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ConditionCtrl_i : in std_ulogic_vector(2 downto 0);
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FlagC_i : in std_ulogic;
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FlagZ_i : in std_ulogic;
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PC_o : out std_ulogic_vector(GEN_WIDTH_PC-1 downto 0) --
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);
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end cp_ProgramFlowControl;
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--------------------------------------------------------------------------------
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-- Architecture: RTL
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-- of entity : cp_ProgramFlowControl
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--------------------------------------------------------------------------------
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architecture rtl of cp_ProgramFlowControl is
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--------------------------------------------------------------------------------
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-- Définition des fonctions
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- Définition des constantes
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--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- Définition des signaux interne
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--------------------------------------------------------------------------------
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signal iPC : std_ulogic_vector(GEN_WIDTH_PC-1 downto 0); -- Programm Counter Signal
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signal iPCin : std_ulogic_vector(GEN_WIDTH_PC-1 downto 0); -- Programm Counter Signal
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signal iDataStackToPC : std_ulogic_vector(GEN_WIDTH_PC-1 downto 0);
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signal iChangePC : std_ulogic;
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alias iUnConditionnal : std_ulogic is ConditionCtrl_i(2);
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alias iConditionnal : std_ulogic_vector(1 downto 0) is ConditionCtrl_i(1 downto 0);
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signal iCondition : std_ulogic;
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signal iPush : std_ulogic;
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signal iPop : std_ulogic;
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--------------------------------------------------------------------------------
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-- Déclaration des composants
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--------------------------------------------------------------------------------
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component cp_ProgramCounter
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generic
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(
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GEN_WIDTH_PC : positive := 8
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);
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port (
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--------------------------------------------------------------------------------
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-- Signaux Systeme
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--------------------------------------------------------------------------------
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Clk_i : in std_ulogic; -- signal d'horloge générale
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Rst_i_n : in std_ulogic; -- signal de reset générale
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Enable_i : in std_ulogic;
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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PC_i : in std_ulogic_vector(GEN_WIDTH_PC-1 downto 0);
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Change_i : in std_ulogic;
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PC_o : out std_ulogic_vector(GEN_WIDTH_PC-1 downto 0)
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);
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end component;
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component cp_Stack
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generic
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(
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GEN_WIDTH_PC : positive := 8;
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GEN_DETPH : positive := 15
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);
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port (
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--------------------------------------------------------------------------------
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-- Signaux Systeme
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--------------------------------------------------------------------------------
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Clk_i : in std_ulogic; -- signal d'horloge générale
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Rst_i_n : in std_ulogic; -- signal de reset générale
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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Data_i : in std_ulogic_vector(GEN_WIDTH_PC-1 downto 0); --
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Data_o : out std_ulogic_vector(GEN_WIDTH_PC-1 downto 0); --
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Enable_i : in std_ulogic;
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Push_i : in std_ulogic;
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Pop_i : in std_ulogic
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);
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end component;
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begin
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--------------------------------------------------------------------------------
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-- Traitement des conditions du saut du PC
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--------------------------------------------------------------------------------
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iCondition <= '1' when (iUnConditionnal='0') else
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FlagZ_i when (iConditionnal="00") else
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not(FlagZ_i) when (iConditionnal="01") else
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FlagC_i when (iConditionnal="10") else
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not(FlagC_i) when (iConditionnal="11") else
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'0';
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-- Commande d'écriture de la nouvelle valeur du PC
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iChangePC <= ((Jump_i or Call_i or Return_i) and (iCondition))
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or
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(Interrupt_i) or (ReturnI_i);
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-- Nouvelle valeur du PC
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iPCin <= -- !TODO : Who has the priority, Jump or Interrupt?
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(GEN_INT_VECTOR(GEN_WIDTH_PC-1 downto 0)) when (Interrupt_i='1') else
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(iDataStackToPC) when (ReturnI_i='1') else
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(std_ulogic_vector(UNSIGNED(iDataStackToPC) + 1)) when (Return_i='1') else
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(aaa_i);
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--------------------------------------------------------------------------------
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-- Traitement des commande de Push & Pop de la stack
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--------------------------------------------------------------------------------
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iPush <= (iCondition and Call_i) or (Interrupt_i);
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iPop <= (iCondition and Return_i) or (ReturnI_i);
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--------------------------------------------------------------------------------
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-- Instantiation du composant "cp_ProgramCounter"
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--------------------------------------------------------------------------------
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U_ProgramCounter : cp_ProgramCounter
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generic map
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(
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GEN_WIDTH_PC => GEN_WIDTH_PC
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)
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port map(
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--------------------------------------------------------------------------------
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-- Signaux Systeme
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--------------------------------------------------------------------------------
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Clk_i => Clk_i,
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Rst_i_n => Rst_i_n,
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Enable_i => Enable_i,
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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PC_i => iPCin,
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Change_i => iChangePC,
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PC_o => iPC
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);
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--------------------------------------------------------------------------------
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-- Instantiation du composant "cp_Stack"
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--------------------------------------------------------------------------------
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U_Stack : cp_Stack
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generic map
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(
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GEN_WIDTH_PC => GEN_WIDTH_PC,
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GEN_DETPH => GEN_DEPTH_STACK
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)
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port map(
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--------------------------------------------------------------------------------
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-- Signaux Systeme
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--------------------------------------------------------------------------------
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Clk_i => Clk_i,
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Rst_i_n => Rst_i_n,
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--------------------------------------------------------------------------------
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-- Signaux Fonctionels
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--------------------------------------------------------------------------------
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Data_i => iPC,
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Data_o => iDataStackToPC,
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Enable_i => Enable_i,
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Push_i => iPush,
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Pop_i => iPop
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);
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--------------------------------------------------------------------------------
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-- Sorties
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--------------------------------------------------------------------------------
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PC_o <= iPC;
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end rtl;
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No newline at end of file
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No newline at end of file
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