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URL https://opencores.org/ocsvn/copyblaze/copyblaze/trunk

Subversion Repositories copyblaze

[/] [copyblaze/] [trunk/] [copyblaze/] [sim/] [rtl_sim/] [bin/] [tb_copyBlaze_ecoSystem_run.do] - Diff between revs 20 and 24

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Rev 20 Rev 24
?rev1line?
?rev2line?
 
quietly set ACTELLIBNAME proasic3
 
quietly set PROJECT_DIR "E:/User/Projets/E3CAR/03-Fpga/mP_8bit/copyblaze/copyblaze"
 
 
 
if {[file exists presynth/_info]} {
 
   echo "INFO: Simulation library presynth already exists"
 
} else {
 
   vlib presynth
 
}
 
vmap presynth presynth
 
vmap proasic3 "C:/Actel/Libero_v9.1/Designer/lib/modelsim/precompiled/vhdl/proasic3"
 
 
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_Usefull_Pkg.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_Toggle.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_Interrupt.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_ProgramCounter.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_Stack.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_ProgramFlowControl.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_DecodeControl.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_FullAdder.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_CLAAdder.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_ALU.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_Flags.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_BancRegister.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_ScratchPad.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_copyBlaze.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_ROM_Code.vhd"
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/rtl/vhdl/cp_copyBlaze_ecoSystem.vhd"
 
 
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/sim/rtl_sim/src/wb_gpio/WBOPRT08.vhd"
 
 
 
vcom -93 -explicit -work presynth "${PROJECT_DIR}/bench/vhdl/tb_copyBlaze_ecoSystem.vhd"
 
 
 
vsim -L proasic3 -L presynth  -t 1ps presynth.tb_copyBlaze_ecoSystem
 
# The following lines are commented because no testbench is associated with the project
 
# add wave /tb_copyBlaze_ecoSystem/*
 
# run 1000ns
 
 
 
radix hexadecimal
 
do wave_tb_copyBlaze_ecoSystem.do
 
 
 
run -all

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