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Line 5... |
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; this programm test the wishbone copyBlaze instruction.
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; this programm test the wishbone copyBlaze instruction.
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; it use this module :
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; it use this module :
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; wb_uart_08.vhd
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; wb_uart_08.vhd
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WB_UART_STATUS .EQU 0x00
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WB_UART_DIV_LOW .EQU 0x04
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WB_UART_DIV_HIGH .EQU 0x05
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WB_UART_DATA .EQU 0x08
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wb_data_to_wb .EQU s0
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wb_data_from_wb .EQU s1
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;
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;
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; ==========================================================
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; ==========================================================
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start:
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start:
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; ==========================================================
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; ==========================================================
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; initialize the wb_uart registers
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LOAD wb_data_to_wb, 0x02 ;
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WBWRSING wb_data_to_wb, WB_UART_DIV_LOW ; DIV_LOW = 0x02
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LOAD wb_data_to_wb, 0x00 ;
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WBWRSING wb_data_to_wb, WB_UART_DIV_HIGH ; DIV_HIGH = 0x00
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; LOAD wb_data_to_wb, 0x04 ;
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; WBWRSING wb_data_to_wb, WB_UART_STATUS ; STATUS = 0x04 : rx_irqen=1
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LOAD wb_data_to_wb, 0x08 ;
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WBWRSING wb_data_to_wb, WB_UART_STATUS ; STATUS = 0x08 : tx_irqen=1
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; write a data to the UART
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LOAD wb_data_to_wb, 0x55 ;
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WBWRSING wb_data_to_wb, WB_UART_DATA ;
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; enable interrupts
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EINT
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end:
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end:
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JUMP end
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JUMP end
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;
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;
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; *************************
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; Interrupt Service Routine
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; *************************
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ISR:
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WBRDSING wb_data_from_wb, WB_UART_STATUS ; read the status
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ADD wb_data_to_wb, 0x01
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WBWRSING wb_data_to_wb, WB_UART_DATA ;
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RETI ENABLE
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; RETI DISABLE
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; *************************
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; End ISR Interrupt Handler
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; *************************
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.ORG 0x3FF
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VECTOR:
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JUMP ISR
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