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[/] [cowgirl/] [trunk/] [logical.vhd] - Diff between revs 2 and 4
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-- 10/25/2005
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-- Logical Unit
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library ieee;
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use ieee.std_logic_1164.all;
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entity logical is port(
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a: in std_logic_vector(15 downto 0);
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b: in std_logic_vector(15 downto 0);
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fcn: in std_logic_vector(2 downto 0);
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o: out std_logic_vector(15 downto 0)
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);
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end logical;
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architecture logic_arch of logical is
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begin
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logical_logic: process(fcn)
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begin
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case fcn is
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when "000" => -- not
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o <= not(a);
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when "001" => -- and
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o <= a and b;
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when "010" => -- or
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o <= a or b;
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when "011" => -- xor
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o <= a xor b;
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when "100" => -- nand
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o <= a nand b;
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when "101" => -- nor
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o <= a nor b;
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when others =>
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o <= x"0000";
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end case;
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end process logical_logic;
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end logic_arch;
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