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[/] [cowgirl/] [trunk/] [logical.vhd] - Diff between revs 2 and 4

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-- 10/25/2005
 
-- Logical Unit
 
 
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library ieee;
 
use ieee.std_logic_1164.all;
 
 
 
entity logical is port(
 
        a:      in std_logic_vector(15 downto 0);
 
        b:      in std_logic_vector(15 downto 0);
 
        fcn:    in std_logic_vector(2 downto 0);
 
        o:      out std_logic_vector(15 downto 0)
 
);
 
end logical;
 
 
 
architecture logic_arch of logical is
 
begin
 
        logical_logic: process(fcn)
 
        begin
 
                case fcn is
 
                        when "000" =>                   -- not
 
                                o <= not(a);
 
                        when "001" =>                   -- and
 
                                o <= a and b;
 
                        when "010" =>                   -- or
 
                                o <= a or b;
 
                        when "011" =>                   -- xor
 
                                o <= a xor b;
 
                        when "100" =>                   -- nand
 
                                o <= a nand b;
 
                        when "101" =>                   -- nor
 
                                o <= a nor b;
 
                        when others =>
 
                                o <= x"0000";
 
                end case;
 
        end process logical_logic;
 
end logic_arch;
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