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https://opencores.org/ocsvn/cowgirl/cowgirl/trunk
[/] [cowgirl/] [trunk/] [pc.vhdl] - Diff between revs 2 and 4
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-- 10/24/2005
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-- Program Counter
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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entity pc is port(
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reset: in std_logic;
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clk: in std_logic;
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load: in std_logic;
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d: in std_logic_vector(15 downto 0);
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c: out std_logic_vector(15 downto 0)
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);
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end pc;
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architecture pc_arch of pc is
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signal count: unsigned(15 downto 0);
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--signal count : std_logic_vector(15 downto 0);
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begin
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count_logic:process(clk, reset, load)
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begin
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if reset = '1' then
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count <= x"0000";
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elsif (clk'EVENT and clk='1') then
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count <= count + '1';
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elsif load = '1' then
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count <= unsigned(d);
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end if;
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-- don't assign the output here!
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-- if you do, the count will change on the falling
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-- edge of the clock! and that's lame!
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--c <= count;
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end process count_logic;
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c <= std_logic_vector(count);
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end pc_arch;
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