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V3 56
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V3 53
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FL $XILINX/ISEexamples/cpu8080/vga.vhd 2006/11/15.08:45:56 I.33
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FL $XILINX/ISEexamples/cpu8080/vga.vhd 2006/11/15.08:45:56 I.33
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PH work/vga_pckg 1163739302 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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PH work/vga_pckg 1163883883 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1162002891 CD vga
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1163883879 CD vga
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EN work/vga 1163739303 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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EN work/vga 1163883884 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1162002891
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1163883879
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AR work/vga/vga_arch 1163739304 FL $XILINX/ISEexamples/cpu8080/vga.vhd EN work/vga 1163739303 \
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AR work/vga/vga_arch 1163883885 FL $XILINX/ISEexamples/cpu8080/vga.vhd EN work/vga 1163883884 \
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CP sync
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CP sync
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EN work/sync 1163739305 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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EN work/sync 1163883886 FL $XILINX/ISEexamples/cpu8080/vga.vhd LB unisim \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 \
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1162002891
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PH unisim/VCOMPONENTS 1153527310 PB work/common 1163883879
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AR work/sync/sync_arch 1163739306 FL $XILINX/ISEexamples/cpu8080/vga.vhd EN work/sync 1163739305
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AR work/sync/sync_arch 1163883887 FL $XILINX/ISEexamples/cpu8080/vga.vhd EN work/sync 1163883886
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FL $XILINX/ISEexamples/cpu8080/cpu_tbw.ant 2006/10/28.09:13:00 I.33
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FL $XILINX/ISEexamples/cpu8080/cpu8080.v 2006/11/18.17:04:54 I.33
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MO work/cpu_tbw FL $XILINX/ISEexamples/cpu8080/cpu_tbw.ant MI testbench
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FL $XILINX/ISEexamples/cpu8080/cpu8080.v 2006/11/16.20:07:40 I.33
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MO work/cpu8080 FL $XILINX/ISEexamples/cpu8080/cpu8080.v MI alu
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MO work/cpu8080 FL $XILINX/ISEexamples/cpu8080/cpu8080.v MI alu
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MO work/alu FL $XILINX/ISEexamples/cpu8080/cpu8080.v
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MO work/alu FL $XILINX/ISEexamples/cpu8080/cpu8080.v
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FL $XILINX/ISEexamples/cpu8080/vgachr.v 2006/11/15.08:51:40 I.33
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FL $XILINX/ISEexamples/cpu8080/vgachr.v 2006/11/15.08:51:40 I.33
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MO work/terminal FL $XILINX/ISEexamples/cpu8080/vgachr.v MI chrmemmap \
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MO work/terminal FL $XILINX/ISEexamples/cpu8080/vgachr.v MI chrmemmap \
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MI ps2_kbd MI scnrom MI scnromu
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MI ps2_kbd MI scnrom MI scnromu
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MO work/chrmemmap FL $XILINX/ISEexamples/cpu8080/vgachr.v MI chrrom MI vga
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MO work/chrmemmap FL $XILINX/ISEexamples/cpu8080/vgachr.v MI chrrom MI vga
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MO work/chrrom FL $XILINX/ISEexamples/cpu8080/vgachr.v
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MO work/chrrom FL $XILINX/ISEexamples/cpu8080/vgachr.v
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MO work/scnrom FL $XILINX/ISEexamples/cpu8080/vgachr.v
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MO work/scnrom FL $XILINX/ISEexamples/cpu8080/vgachr.v
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MO work/scnromu FL $XILINX/ISEexamples/cpu8080/vgachr.v
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MO work/scnromu FL $XILINX/ISEexamples/cpu8080/vgachr.v
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FL $XILINX/ISEexamples/cpu8080/cpu8080_tbw.tfw 2006/11/04.23:09:58 I.33
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FL $XILINX/ISEexamples/cpu8080/cpu8080_tbw.tfw 2006/11/18.13:39:14 I.33
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MO work/cpu8080_tbw FL $XILINX/ISEexamples/cpu8080/cpu8080_tbw.tfw \
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MO work/cpu8080_tbw FL $XILINX/ISEexamples/cpu8080/cpu8080_tbw.tfw \
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MI testbench
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MI testbench
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FL test.lst 2006/11/04.23:37:34 I.33
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FL $XILINX/ISEexamples/cpu8080/testbench.v 2006/11/17.09:21:30 I.33 FL test.rom
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FL $XILINX/ISEexamples/cpu8080/testbench.v 2006/11/16.21:40:32 I.33 FL test.rom
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MO work/testbench FL $XILINX/ISEexamples/cpu8080/testbench.v MI cpu8080 \
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MO work/testbench FL $XILINX/ISEexamples/cpu8080/testbench.v MI cpu8080 \
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MI intcontrol MI ram MI rom MI select MI terminal
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MI intcontrol MI ram MI rom MI select MI terminal
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MO work/select FL $XILINX/ISEexamples/cpu8080/testbench.v MI selectone
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MO work/select FL $XILINX/ISEexamples/cpu8080/testbench.v MI selectone
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MO work/selectone FL $XILINX/ISEexamples/cpu8080/testbench.v
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MO work/selectone FL $XILINX/ISEexamples/cpu8080/testbench.v
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MO work/intcontrol FL $XILINX/ISEexamples/cpu8080/testbench.v
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MO work/intcontrol FL $XILINX/ISEexamples/cpu8080/testbench.v
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MO work/rom FL $XILINX/ISEexamples/cpu8080/testbench.v
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MO work/rom FL $XILINX/ISEexamples/cpu8080/testbench.v
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MO work/ram FL $XILINX/ISEexamples/cpu8080/testbench.v
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MO work/ram FL $XILINX/ISEexamples/cpu8080/testbench.v
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FL $XILINX/verilog/src/glbl.v 2006/05/17.11:09:08 I.33
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FL $XILINX/verilog/src/glbl.v 2006/05/17.11:09:08 I.33
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MO work/glbl FL $XILINX/verilog/src/glbl.v
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MO work/glbl FL $XILINX/verilog/src/glbl.v
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FL test.rom 2006/11/16.21:40:18 I.33
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FL test.rom 2006/11/17.09:21:06 I.33
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FL $XILINX/ISEexamples/cpu8080/ps2_kbd.vhd 2006/11/08.21:59:14 I.33
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FL $XILINX/ISEexamples/cpu8080/ps2_kbd.vhd 2006/11/08.21:59:14 I.33
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PH work/ps2_kbd_pckg 1163059896 FL $XILINX/ISEexamples/cpu8080/ps2_kbd.vhd \
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PH work/ps2_kbd_pckg 1163883880 FL $XILINX/ISEexamples/cpu8080/ps2_kbd.vhd \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 CD ps2_kbd
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794 CD ps2_kbd
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EN work/ps2_kbd 1163059897 FL $XILINX/ISEexamples/cpu8080/ps2_kbd.vhd \
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EN work/ps2_kbd 1163883881 FL $XILINX/ISEexamples/cpu8080/ps2_kbd.vhd \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794
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AR work/ps2_kbd/arch 1163059898 FL $XILINX/ISEexamples/cpu8080/ps2_kbd.vhd \
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AR work/ps2_kbd/arch 1163883882 FL $XILINX/ISEexamples/cpu8080/ps2_kbd.vhd \
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EN work/ps2_kbd 1163059897
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EN work/ps2_kbd 1163883881
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FL $XILINX/ISEexamples/cpu8080/common.vhd 2006/10/16.23:07:12 I.33
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FL $XILINX/ISEexamples/cpu8080/common.vhd 2006/10/16.23:07:12 I.33
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PH work/common 1162002890 FL $XILINX/ISEexamples/cpu8080/common.vhd \
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PH work/common 1163883878 FL $XILINX/ISEexamples/cpu8080/common.vhd \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794
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PB work/common 1162002891 FL $XILINX/ISEexamples/cpu8080/common.vhd PH work/common 1162002890 \
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PB work/common 1163883879 FL $XILINX/ISEexamples/cpu8080/common.vhd PH work/common 1163883878 \
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794
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PB ieee/std_logic_1164 1153526780 PB ieee/NUMERIC_STD 1153526794
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