URL https://opencores.org/ocsvn/cpu8080/cpu8080/trunk

Subversion Repositories cpu8080

[/] [cpu8080/] [trunk/] [project/] [netgen/] [synthesis/] [_synthesis.nlf] - Diff between revs 2 and 11

Rev 2	Rev 11
Line 14...	Line 14...
`INFO:NetListWriters:633 - The generated Verilog netlist contains Xilinx UNISIM`	`INFO:NetListWriters:633 - The generated Verilog netlist contains Xilinx UNISIM`
`simulation primitives and has to be used with UNISIM simulation library for`	`simulation primitives and has to be used with UNISIM simulation library for`
`correct compilation and simulation.`	`correct compilation and simulation.`
`Number of warnings: 0`	`Number of warnings: 0`
`Number of info messages: 1`	`Number of info messages: 1`
`Total memory usage is 57836 kilobytes`	`Total memory usage is 63980 kilobytes`
`Total memory usage is 63980 kilobytes`	`Total memory usage is 63980 kilobytes`