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[/] [cpu8080/] [trunk/] [project/] [testbench.stx] - Diff between revs 20 and 24

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Rev 20 Rev 24
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Release 8.2.02i - xst I.33
Release 8.2.02i - xst I.33
Copyright (c) 1995-2006 Xilinx, Inc.  All rights reserved.
Copyright (c) 1995-2006 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to ./xst/projnav.tmp
--> Parameter TMPDIR set to ./xst/projnav.tmp
CPU : 0.00 / 0.25 s | Elapsed : 0.00 / 0.00 s
CPU : 0.00 / 0.19 s | Elapsed : 0.00 / 0.00 s
 
 
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=========================================================================
=========================================================================
*                          HDL Compilation                              *
*                          HDL Compilation                              *
=========================================================================
=========================================================================
Compiling vhdl file "C:/Xilinx/ISEexamples/cpu8080/common.vhd" in Library work.
Compiling vhdl file "C:/Xilinx/ISEexamples/cpu8080/common.vhd" in Library work.
Architecture common of Entity common is up to date.
Architecture common of Entity common is up to date.
Compiling vhdl file "C:/Xilinx/ISEexamples/cpu8080/ps2_kbd.vhd" in Library work.
Compiling vhdl file "C:/Xilinx/ISEexamples/cpu8080/ps2_kbd.vhd" in Library work.
Architecture arch of Entity ps2_kbd is up to date.
Architecture arch of Entity ps2_kbd is up to date.
Compiling vhdl file "C:/Xilinx/ISEexamples/cpu8080/vga.vhd" in Library work.
Compiling vhdl file "C:/Xilinx/ISEexamples/cpu8080/vga.vhd" in Library work.
Package  compiled.
Architecture vga_arch of Entity vga is up to date.
Entity  compiled.
Architecture sync_arch of Entity sync is up to date.
Entity  (Architecture ) compiled.
 
Entity  compiled.
 
Entity  (Architecture ) compiled.
 
Compiling verilog file "vgachr.v" in library work
Compiling verilog file "vgachr.v" in library work
Module  compiled
Module  compiled
Module  compiled
Module  compiled
Module  compiled
Module  compiled
Module  compiled
Module  compiled
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Module  compiled
Module  compiled
Module  compiled
Module  compiled
No errors in compilation
No errors in compilation
Analysis of file <"testbench.prj"> succeeded.
Analysis of file <"testbench.prj"> succeeded.
 
 
CPU : 0.88 / 1.13 s | Elapsed : 1.00 / 1.00 s
CPU : 0.73 / 0.92 s | Elapsed : 1.00 / 1.00 s
 
 
-->
-->
 
 
Total memory usage is 113764 kilobytes
Total memory usage is 114788 kilobytes
 
 
Number of errors   :    0 (   0 filtered)
Number of errors   :    0 (   0 filtered)
Number of warnings :    0 (   0 filtered)
Number of warnings :    0 (   0 filtered)
Number of infos    :    0 (   0 filtered)
Number of infos    :    0 (   0 filtered)
 
 

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