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[/] [cpu8080/] [trunk/] [project/] [testbench.v] - Diff between revs 18 and 24
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Rev 24 |
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// 8080 CPU
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// 8080 CPU
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cpu8080 cpu(addr, data, readmem, writemem, readio, writeio, intr, inta, waitr,
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cpu8080 cpu(addr, data, readmem, writemem, readio, writeio, intr, inta, waitr,
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reset, clock);
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reset, clock);
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// Program rom
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// Program rom
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rom rom(addr[9:0], data, romsel&readmem); // unclocked rom
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rom rom(addr[10:0], data, romsel&readmem); // unclocked rom
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// neg clocked ram
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// neg clocked ram
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ram ram(addr[9:0], data, ramsel, readmem, writemem, bootstrap, clock);
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ram ram(addr[9:0], data, ramsel, readmem, writemem, bootstrap, clock);
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// neg clocked interrupt controller
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// neg clocked interrupt controller
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Line 546... |
Line 546... |
// enable outputs only.
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// enable outputs only.
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//
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//
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module rom(addr, data, dataeno);
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module rom(addr, data, dataeno);
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input [9:0] addr;
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input [10:0] addr;
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inout [7:0] data;
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inout [7:0] data;
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input dataeno;
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input dataeno;
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reg [7:0] datao;
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reg [7:0] datao;
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