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<P>An example output of the functional simulation that shows the  operation
<P>An example output of the functional simulation that shows the  operation
our CPU:
our CPU:
 
 
<P><br>
<P><br>
 
 
<P><img src="GTKWave.png">
<P><img src="GTKWave.PNG">
 
 
<P><br>
<P><br>
 
 
<P>We can compare the CPU signals shown with the assembler code being executed.
<P>We can compare the CPU signals shown with the assembler code being executed.
The CPU is executing inside the C function <STRONG>uart_puts()</STRONG>:
The CPU is executing inside the C function <STRONG>uart_puts()</STRONG>:
 
 
<P><br>
<P><br>
 
 
<pre class="vhdl">
<pre class="vhdl">
 
 
156     00000095: (uart_puts):
 
157       95:   01AC            movw    r20, r24
 
158       96:   C003            rjmp     0x9A           ; 0x134 <uart_puts+0xa>
 
159       97:   9B5D            sbis    0x0b, 5 ; 11
 
160       98:   CFFE            rjmp     0x97           ; 0x12e <uart_puts+0x4>
 
161       99:   B92C            out     0x0c, r18       ; 12
 
162       9A:   01FC            movw    r30, r24
 
163       9B:   9601            adiw    r24, 0x01       ; 1
 
164       9C:   9124            lpm     r18, Z
 
165       9D:   2322            and     r18, r18
 
166       9E:   F7C1            brne     0x97           ; 0x12e <uart_puts+0x4>
 
167       9F:   1B84            sub     r24, r20
 
168       A0:   0B95            sbc     r25, r21
 
169       A1:   9701            sbiw    r24, 0x01       ; 1
 
170       A2:   9508            ret
 
<pre class="filename">
<pre class="filename">
app/hello.lss1
app/hello.lss1
</pre></pre>
</pre></pre>
<P>
<P>
 
 
Line 155... Line 140...
  1     #include "assert.h"
  1     #include "assert.h"
  2     #include "stdio.h"
  2     #include "stdio.h"
  3     #include "stdint.h"
  3     #include "stdint.h"
  4     #include "string.h"
  4     #include "string.h"
  5
  5
  6     const char * hex_file = 0;
  6     uint8_t buffer[0x10000];    // 64 k is max. for Intel hex.
  7     const char * vhdl_file = 0;
  7     uint8_t slice [0x10000];    // 16 k is max. for Xilinx bram
  8
  8
  9     uint8_t buffer[0x10000];
  9     //-----------------------------------------------------------------------------
 10
 10     //
 11     //-----------------------------------------------------------------------------
 11     // get a byte (from cp pointing into Intel hex file).
 12     uint32_t
 12     //
 13     get_byte(const char *  cp)
 13     uint32_t
 14     {
 14     get_byte(const char *  cp)
 15     uint32_t value;
 15     {
 16     const char cc[3] = { cp[0], cp[1], 0 };
 16     uint32_t value;
 17     const int cnt = sscanf(cc, "%X", &value);
 17     const char cc[3] = { cp[0], cp[1], 0 };
 18        assert(cnt == 1);
 18     const int cnt = sscanf(cc, "%X", &value);
 19        return value;
 19        assert(cnt == 1);
 20     }
 20        return value;
 21     //-----------------------------------------------------------------------------
 21     }
 22     void
 22     //-----------------------------------------------------------------------------
 23     read_file(FILE * in)
 23     //
 24     {
 24     // read an Intel hex file into buffer
 25        memset(buffer, 0xFF, sizeof(buffer));
 25     void
 26     char line[200];
 26     read_file(FILE * in)
 27        for (;;)
 27     {
 28            {
 28        memset(buffer, 0xFF, sizeof(buffer));
 29              const char * s = fgets(line, sizeof(line) - 2, in);
 29     char line[200];
 30              if (s == 0)   return;
 30        for (;;)
 31              assert(*s++ == ':');
 31            {
 32              const uint32_t len     = get_byte(s);
 32              const char * s = fgets(line, sizeof(line) - 2, in);
 33              const uint32_t ah      = get_byte(s + 2);
 33              if (s == 0)   return;
 34              const uint32_t al      = get_byte(s + 4);
 34              assert(*s++ == ':');
 35              const uint32_t rectype = get_byte(s + 6);
 35              const uint32_t len     = get_byte(s);
 36              const char * d = s + 8;
 36              const uint32_t ah      = get_byte(s + 2);
 37              const uint32_t addr = ah << 8 | al;
 37              const uint32_t al      = get_byte(s + 4);
 38
 38              const uint32_t rectype = get_byte(s + 6);
 39              uint32_t csum = len + ah + al + rectype;
 39              const char * d = s + 8;
 40              assert((addr + len) <= 0x10000);
 40              const uint32_t addr = ah << 8 | al;
 41              for (uint32_t l = 0; l < len; ++l)
 41
 42                  {
 42              uint32_t csum = len + ah + al + rectype;
 43                    const uint32_t byte = get_byte(d);
 43              assert((addr + len) <= 0x10000);
 44                    d += 2;
 44              for (uint32_t l = 0; l < len; ++l)
 45                    buffer[addr + l] = byte;
 45                  {
 46                    csum += byte;
 46                    const uint32_t byte = get_byte(d);
 47                  }
 47                    d += 2;
 48
 48                    buffer[addr + l] = byte;
 49              csum = 0xFF & -csum;
 49                    csum += byte;
 50              const uint32_t sum = get_byte(d);
 50                  }
 51              assert(sum == csum);
 51
 52            }
 52              csum = 0xFF & -csum;
 53     }
 53              const uint32_t sum = get_byte(d);
 54     //-----------------------------------------------------------------------------
 54              assert(sum == csum);
 55     void
 55            }
 56     write_vector(FILE * out, bool odd, uint32_t mem, uint32_t v)
 56     }
 57     {
 57     //-----------------------------------------------------------------------------
 58     const uint8_t * base = buffer;
 58     //
 59
 59     // copy a slice from buffer into slice.
 60        // total memory is 2 even bytes, 2 odd bytes, 2 even bytes, ...
 60     // buffer is organized as 32-bit x items.
 61        //
 61     // slice is organized as bits x items.
 62        if (odd)   base += 2;
 62     //
 63
 63     void copy_slice(uint32_t slice_num, uint32_t port_bits, uint32_t mem_bits)
 64        // total memory is 4 kByte organized into 8 memories.
 64     {
 65        // thus each of the 16 vectors covers 256 bytes.
 65        assert(mem_bits == 0x1000 || mem_bits == 0x4000);
 66        //
 66
 67        base += v*256;
 67     const uint32_t items = mem_bits/port_bits;
 68
 68     const uint32_t mask = (1 << port_bits) - 1;
 69        // memories 0 and 1 are the low byte of the opcode while
 69     const uint8_t * src = buffer;
 70        // memories 2 and 3 are the high byte.
 70
 71        //
 71         memset(slice, 0, sizeof(slice));
 72        if (mem >= 2)   ++base;
 72
 73
 73         for (uint32_t i = 0; i < items; ++i)
 74     const char * px = odd ? "po" : "pe";
 74             {
 75        fprintf(out, "constant %s_%u_%2.2X : BIT_VECTOR := X\"", px, mem, v);
 75               // read one 32-bit value;
 76        for (int32_t d = 63; d >= 0; --d)
 76               const uint32_t v0 = *src++;
 77            {
 77               const uint32_t v1 = *src++;
 78              uint32_t q = base[4*d];
 78               const uint32_t v2 = *src++;
 79              if (mem & 1)   q >>= 4;     // high nibble
 79               const uint32_t v3 = *src++;
 80              else           q &= 0x0F;   // low nibble
 80               const uint32_t v = (v3 << 24 |
 81              fprintf(out, "%X", q);
 81                                   v2 << 16 |
 82            }
 82                                   v1 <<  8 |
 83
 83                                   v0       ) >> (slice_num*port_bits) & mask;
 84        fprintf(out, "\";\r\n");
 84
 85     }
 85               if (port_bits == 16)
 86     //-----------------------------------------------------------------------------
 86                  {
 87     void
 87                    assert(v < 0x10000);
 88     write_mem(FILE * out, bool odd, uint32_t mem)
 88                    slice[2*i]     = v;
 89     {
 89                    slice[2*i + 1] = v >> 8;
 90     const char * px = odd ? "po" : "pe";
 90                  }
 91
 91               else if (port_bits == 8)
 92        fprintf(out, "-- content of %s_%u --------------------------------------"
 92                  {
 93                     "--------------------------------------------\r\n", px, mem);
 93                    assert(v < 0x100);
 94
 94                    slice[i] = v;
 95        for (uint32_t v = 0; v < 16; ++v)
 95                  }
 96            write_vector(out, odd, mem, v);
 96               else if (port_bits == 4)
 97
 97                  {
 98        fprintf(out, "\r\n");
 98                    assert(v < 0x10);
 99     }
 99                    slice[i >> 1] |= v << (4*(i & 1));
100     //-----------------------------------------------------------------------------
100                  }
101     void
101               else if (port_bits == 2)
102     write_file(FILE * out)
102                  {
103     {
103                    assert(v < 0x04);
104        fprintf(out,
104                    slice[i >> 2] |= v << (2*(i & 3));
105     "\r\n"
105                  }
106     "library IEEE;\r\n"
106               else if (port_bits == 1)
107     "use IEEE.STD_LOGIC_1164.all;\r\n"
107                  {
108     "\r\n"
108                    assert(v < 0x02);
109     "package prog_mem_content is\r\n"
109                    slice[i >> 3] |= v << ((i & 7));
110     "\r\n");
110                  }
111
111               else assert(0 && "Bad aspect ratio.");
112        for (uint32_t m = 0; m < 4; ++m)
112             }
113            write_mem(out, false, m);
113     }
114
114     //-----------------------------------------------------------------------------
115        for (uint32_t m = 0; m < 4; ++m)
115     //
116            write_mem(out, true,  m);
116     // write one initialization vector
117
117     //
118        fprintf(out,
118     void
119     "end prog_mem_content;\r\n"
119     write_vector(FILE * out, uint32_t mem, uint32_t vec, const uint8_t * data)
120     "\r\n");
120     {
121     }
121        fprintf(out, "constant p%u_%2.2X : BIT_VECTOR := X\"", mem, vec);
122     //-----------------------------------------------------------------------------
122        for (int32_t d = 31; d >= 0; --d)
123     int
123            fprintf(out, "%2.2X", data[d]);
124     main(int argc, char * argv[])
124
125     {
125        fprintf(out, "\";\r\n");
126        if (argc > 1)   hex_file = argv[1];
126     }
127        if (argc > 2)   vhdl_file = argv[2];
127     //-----------------------------------------------------------------------------
128
128     //
129     FILE * in = stdin;
129     // write one memory
130        if (hex_file)   in = fopen(hex_file, "r");
130     //
131        assert(in);
131     void
132        read_file(in);
132     write_mem(FILE * out, uint32_t mem, uint32_t bytes)
133        fclose(in);
133     {
134
134        fprintf(out, "-- content of p_%u --------------------------------------"
135     FILE * out = stdout;
135                     "--------------------------------------------\r\n", mem);
136        if (vhdl_file)   out = fopen(vhdl_file, "w");
136
137        write_file(out);
137     const uint8_t * src = slice;
138        assert(out);
138        for (uint32_t v = 0; v < bytes/32; ++v)
139     }
139            write_vector(out, mem, v, src + 32*v);
140     //-----------------------------------------------------------------------------
140
 
141        fprintf(out, "\r\n");
 
142     }
 
143     //-----------------------------------------------------------------------------
 
144     //
 
145     // write the entire memory_contents file.
 
146     //
 
147     void
 
148     write_file(FILE * out, uint32_t bits)
 
149     {
 
150        fprintf(out,
 
151     "\r\n"
 
152     "library IEEE;\r\n"
 
153     "use IEEE.STD_LOGIC_1164.all;\r\n"
 
154     "\r\n"
 
155     "package prog_mem_content is\r\n"
 
156     "\r\n");
 
157
 
158     const uint32_t mems = 16/bits;
 
159
 
160        for (uint32_t m = 0; m < 2*mems; ++m)
 
161            {
 
162              copy_slice(m, bits, 0x1000);
 
163              write_mem(out, m, 0x200);
 
164            }
 
165
 
166        fprintf(out,
 
167     "end prog_mem_content;\r\n"
 
168     "\r\n");
 
169     }
 
170     //-----------------------------------------------------------------------------
 
171     int
 
172     main(int argc, char * argv[])
 
173     {
 
174     uint32_t bits = 4;
 
175     const char * prog = *argv++;   --argc;
 
176
 
177        if      (argc && !strcmp(*argv, "-1"))    { bits =  1;   ++argv;   --argc; }
 
178        else if (argc && !strcmp(*argv, "-2"))    { bits =  2;   ++argv;   --argc; }
 
179        else if (argc && !strcmp(*argv, "-4"))    { bits =  4;   ++argv;   --argc; }
 
180        else if (argc && !strcmp(*argv, "-8"))    { bits =  8;   ++argv;   --argc; }
 
181        else if (argc && !strcmp(*argv, "-16"))   { bits = 16;   ++argv;   --argc; }
 
182
 
183     const char * hex_file = 0;
 
184     const char * vhdl_file = 0;
 
185
 
186        if (argc)   { hex_file  = *argv++;   --argc; }
 
187        if (argc)   { vhdl_file = *argv++;   --argc; }
 
188        assert(argc == 0);
 
189
 
190     FILE * in = stdin;
 
191        if (hex_file)   in = fopen(hex_file, "r");
 
192        assert(in);
 
193        read_file(in);
 
194        fclose(in);
 
195
 
196     FILE * out = stdout;
 
197        if (vhdl_file)   out = fopen(vhdl_file, "w");
 
198        write_file(out, bits);
 
199        assert(out);
 
200     }
 
201     //-----------------------------------------------------------------------------
<pre class="filename">
<pre class="filename">
tools/make_mem.cc
tools/make_mem.cc
</pre></pre>
</pre></pre>
<P>
<P>
 
 
Line 570... Line 616...
 
 
<pre class="cmd">
<pre class="cmd">
 
 
# Compile and link hello.c.
# Compile and link hello.c.
avr-gcc -Wall -Os -fpack-struct -fshort-enums -funsigned-char -funsigned-bitfields -mmcu=atmega8 \
avr-gcc -Wall -Os -fpack-struct -fshort-enums -funsigned-char -funsigned-bitfields -mmcu=atmega8 \
    -DF_CPU=33333333UL -MMD -MP -MF"main.d" -MT"main.d" -c -o"main.o" "main.c"
    -DF_CPU=25000000UL -c -o"hello.o" "hello.c"
avr-gcc -Wl,-Map,AVR_FPGA.map -mmcu=atmega8 -o"AVR_FPGA.elf"  ./main.o
avr-gcc -Wl,-Map,hello.map -mmcu=atmega8 -o"hello.elf"  ./hello.o
 
 
# Create an opcode listing.
# Create an opcode listing.
avr-objdump -h -S AVR_FPGA.elf  >"AVR_FPGA.lss"
avr-objdump -h -S hello.elf  >"hello.lss"
 
 
# Create intel hex file.
# Create intel hex file.
avr-objcopy -R .eeprom -O ihex AVR_FPGA.elf  "AVR_FPGA.hex"
avr-objcopy -R .eeprom -O ihex hello.elf  "hello.hex"
 
 
</pre>
</pre>
<P>
<P>
 
 
<P><br>
<P><br>
Line 901... Line 947...
  4     #
  4     #
  5     FILES           += src/*.vhd
  5     FILES           += src/*.vhd
  6
  6
  7     # the testbench sources and binary.
  7     # the testbench sources and binary.
  8     #
  8     #
  9     SIMFILES        = test/test_tb.vhd test/RAMB4_S4_S4.vhd
  9     SIMFILES        =  test/test_tb.vhd
 10     SIMTOP          = testbench
 10     SIMFILES        += test/RAMB4_S4_S4.vhd
 11
 11     SIMFILES        += test/RAM32X1S.vhd
 12     # When to stop the simulation
 12     SIMTOP          = testbench
 13     #
 13
 14     # GHDL_SIM_OPT  = --assert-level=error
 14     # When to stop the simulation
 15     GHDL_SIM_OPT    = --stop-time=40us
 15     #
 16
 16     # GHDL_SIM_OPT  = --assert-level=error
 17     SIMDIR          = simu
 17     GHDL_SIM_OPT    = --stop-time=40us
 18
 18
 19     FLAGS           = --ieee=synopsys --warn-no-vital-generic -fexplicit --std=93c
 19     SIMDIR          = simu
 20
 20
 21     all:
 21     FLAGS           = --ieee=synopsys --warn-no-vital-generic -fexplicit --std=93c
 22             make compile
 22
 23             make run 2>& 1 | grep -v std_logic_arith
 23     all:
 24             make view
 24             make compile
 25
 25             make run 2>& 1 | grep -v std_logic_arith
 26     compile:
 26             make view
 27             @mkdir -p simu
 27
 28             @echo -----------------------------------------------------------------
 28     compile:
 29             ghdl -i $(FLAGS) --workdir=simu --work=work $(SIMFILES) $(FILES)
 29             @mkdir -p simu
 30             @echo
 30             @echo -----------------------------------------------------------------
 31             @echo -----------------------------------------------------------------
 31             ghdl -i $(FLAGS) --workdir=simu --work=work $(SIMFILES) $(FILES)
 32             ghdl -m $(FLAGS) --workdir=simu --work=work $(SIMTOP)
 32             @echo
 33             @echo
 33             @echo -----------------------------------------------------------------
 34             @mv $(SIMTOP) simu/$(SIMTOP)
 34             ghdl -m $(FLAGS) --workdir=simu --work=work $(SIMTOP)
 35
 35             @echo
 36     run:
 36             @mv $(SIMTOP) simu/$(SIMTOP)
 37             @$(SIMDIR)/$(SIMTOP) $(GHDL_SIM_OPT) --vcdgz=$(SIMDIR)/$(SIMTOP).vcdgz
 37
 38
 38     run:
 39     view:
 39             @$(SIMDIR)/$(SIMTOP) $(GHDL_SIM_OPT) --vcdgz=$(SIMDIR)/$(SIMTOP).vcdgz
 40             gunzip --stdout $(SIMDIR)/$(SIMTOP).vcdgz | gtkwave --vcd gtkwave.save
 40
 41
 41     view:
 42     clean:
 42             gunzip --stdout $(SIMDIR)/$(SIMTOP).vcdgz | gtkwave --vcd gtkwave.save
 43             ghdl --clean --workdir=simu
 43
 44
 44     clean:
 
 45             ghdl --clean --workdir=simu
 
 46
<pre class="filename">
<pre class="filename">
Makefile
Makefile
</pre></pre>
</pre></pre>
<P>
<P>
 
 
Line 997... Line 1045...
<P><br>
<P><br>
 
 
<pre class="vhdl">
<pre class="vhdl">
 
 
  1     NET     I_CLK_100       PERIOD = 10 ns;
  1     NET     I_CLK_100       PERIOD = 10 ns;
  2     NET     L_CLK           PERIOD = 35 ns;
  2     NET     L_CLK           PERIOD = 45 ns;
  3
  3
  4     NET     I_CLK_100       TNM_NET = I_CLK_100;
  4     NET     I_CLK_100       TNM_NET = I_CLK_100;
  5     NET     L_CLK           TNM_NET = L_CLK;
  5     NET     L_CLK           TNM_NET = L_CLK;
  6
  6
  7     NET     I_CLK_100       LOC = AA12;
  7     NET     I_CLK_100       LOC = AA12;
Line 1100... Line 1148...
 
 
<P><br>
<P><br>
 
 
<pre class="vhdl">
<pre class="vhdl">
 
 
  2     NET     L_CLK           PERIOD = 35 ns;
  2     NET     L_CLK           PERIOD = 45 ns;
<pre class="filename">
<pre class="filename">
src/avr_fpga.ucf
src/avr_fpga.ucf
</pre></pre>
</pre></pre>
<P>
<P>
 
 

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