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https://opencores.org/ocsvn/cpu_lecture/cpu_lecture/trunk
[/] [cpu_lecture/] [trunk/] [src/] [io.vhd] - Diff between revs 22 and 23
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| Rev 22 |
Rev 23 |
| Line 165... |
Line 165... |
begin
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begin
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if (rising_edge(I_CLK)) then
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if (rising_edge(I_CLK)) then
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if (I_CLR = '1') then
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if (I_CLR = '1') then
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L_INTVEC <= "000000";
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L_INTVEC <= "000000";
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else
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else
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case L_INTVEC is
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when "101011" => -- vector 11 interrupt pending.
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if (L_RX_INT_ENABLED and U_RX_READY) = '0' then
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L_INTVEC <= "000000";
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end if;
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when "101100" => -- vector 12 interrupt pending.
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if (L_TX_INT_ENABLED and not U_TX_BUSY) = '0' then
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L_INTVEC <= "000000";
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end if;
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when others =>
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-- no interrupt is pending.
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-- We accept a new interrupt.
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--
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if (L_RX_INT_ENABLED and U_RX_READY) = '1' then
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if (L_RX_INT_ENABLED and U_RX_READY) = '1' then
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if (L_INTVEC(5) = '0') then -- no interrupt pending
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L_INTVEC <= "101011"; -- _VECTOR(11)
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L_INTVEC <= "101011"; -- _VECTOR(11)
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end if;
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elsif (L_TX_INT_ENABLED and not U_TX_BUSY) = '1' then
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elsif (L_TX_INT_ENABLED and not U_TX_BUSY) = '1' then
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if (L_INTVEC(5) = '0') then -- no interrupt pending
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L_INTVEC <= "101100"; -- _VECTOR(12)
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L_INTVEC <= "101100"; -- _VECTOR(12)
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else
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L_INTVEC <= "000000"; -- no interrupt
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end if;
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end if;
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else -- no interrupt
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end case;
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L_INTVEC <= "000000";
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end if;
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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L_WE_UART <= I_WE_IO when (I_ADR_IO = X"2C") else '0'; -- write UART UDR
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L_WE_UART <= I_WE_IO when (I_ADR_IO = X"2C") else '0'; -- write UART UDR
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