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[/] [dbg_interface/] [tags/] [rel_2/] [rtl/] [verilog/] [tap_top.v] - Diff between revs 45 and 53

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Rev 45 Rev 53
Line 43... Line 43...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.6  2002/04/22 12:55:56  mohor
 
// tdo_padoen_o changed to tdo_padoe_o. Signal is active high.
 
//
// Revision 1.5  2002/03/26 14:23:38  mohor
// Revision 1.5  2002/03/26 14:23:38  mohor
// Signal tdo_padoe_o changed back to tdo_padoen_o.
// Signal tdo_padoe_o changed back to tdo_padoen_o.
//
//
// Revision 1.4  2002/03/25 13:16:15  mohor
// Revision 1.4  2002/03/25 13:16:15  mohor
// tdo_padoen_o changed to tdo_padoe_o. Signal was always active high, just
// tdo_padoen_o changed to tdo_padoe_o. Signal was always active high, just
Line 155... Line 158...
reg     DEBUGSelected;
reg     DEBUGSelected;
reg     BYPASSSelected;
reg     BYPASSSelected;
 
 
reg     BypassRegister;               // Bypass register
reg     BypassRegister;               // Bypass register
 
 
wire    trst;                         // trst is active high while trst_pad_i is active low
wire    trst;
wire    tck;
wire    tck;
wire    TMS;
wire    TMS;
wire    tdi;
wire    tdi;
 
 
wire    RiscDebugScanChain;
wire    RiscDebugScanChain;
wire    WishboneScanChain;
wire    WishboneScanChain;
wire    RegisterScanChain;
wire    RegisterScanChain;
 
 
 
 
assign trst = ~trst_pad_i;                // trst_pad_i is active low
assign trst = trst_pad_i;                // trst_pad_i is active high !!! Inverted on higher layer 
assign tck  = tck_pad_i;
assign tck  = tck_pad_i;
assign TMS  = tms_pad_i;
assign TMS  = tms_pad_i;
assign tdi  = tdi_pad_i;
assign tdi  = tdi_pad_i;
 
 
 
 

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