URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_21/] [bench/] [verilog/] [dbg_tb.v] - Diff between revs 110 and 111

Rev 110	Rev 111
Line 41...	Line 41...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.28 2004/01/19 12:38:10 mohor`
	`// Waiting for "ready" improved.`
	`//`
`// Revision 1.27 2004/01/17 18:01:31 mohor`	`// Revision 1.27 2004/01/17 18:01:31 mohor`
`// New version.`	`// New version.`
`//`	`//`
`// Revision 1.26 2004/01/17 17:01:25 mohor`	`// Revision 1.26 2004/01/17 17:01:25 mohor`
`// Almost finished.`	`// Almost finished.`
Line 137...	Line 140...
`//`	`//`
`//`	`//`


`include "timescale.v"	`include "timescale.v"
	`include "tap_defines.v"
`include "dbg_defines.v"	`include "dbg_defines.v"
`include "dbg_wb_defines.v"	`include "dbg_wb_defines.v"
`include "dbg_cpu_defines.v"	`include "dbg_cpu_defines.v"

`// Test bench`	`// Test bench`
Line 439...	Line 443...
`#500;`	`#500;`
`goto_run_test_idle;`	`goto_run_test_idle;`

`// Testing read and write to internal registers`	`// Testing read and write to internal registers`
`#10000;`	`#10000;`

set_instruction(`IDCODE);	set_instruction(`IDCODE);
`read_id_code;`	`read_id_code;`

set_instruction(`DEBUG);	set_instruction(`DEBUG);
`#10000;`	`#10000;`