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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.35 2004/01/22 11:07:28 mohor
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// test stall_test added.
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//
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// Revision 1.34 2004/01/20 14:24:08 mohor
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// Revision 1.34 2004/01/20 14:24:08 mohor
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// Define name changed.
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// Define name changed.
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//
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//
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// Revision 1.33 2004/01/20 14:05:26 mohor
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// Revision 1.33 2004/01/20 14:05:26 mohor
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// Data latching changed when testing WB.
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// Data latching changed when testing WB.
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task stall_test;
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task stall_test;
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integer i;
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integer i;
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begin
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begin
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test_text = "stall_test";
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$display("\n\n(%0t) stall_test started", $time);
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$display("\n\n(%0t) stall_test started", $time);
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// Set bp_i active for 1 clock cycle and check is stall is set or not
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// Set bp_i active for 1 clock cycle and check is stall is set or not
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check_stall(0); // Should not be set at the beginning
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check_stall(0); // Should not be set at the beginning
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@ (posedge wb_clk_i);
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@ (posedge wb_clk_i);
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#1 dbg_tb.i_cpu_behavioral.cpu_bp_o = 1'b1;
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#1 dbg_tb.i_cpu_behavioral.cpu_bp_o = 1'b1;
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check_stall(1); // set?
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#1 check_stall(1); // set?
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@ (posedge wb_clk_i);
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@ (posedge wb_clk_i);
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#1 dbg_tb.i_cpu_behavioral.cpu_bp_o = 1'b0;
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#1 dbg_tb.i_cpu_behavioral.cpu_bp_o = 1'b0;
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check_stall(1); // set?
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#1 check_stall(1); // set?
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gen_clk(1);
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gen_clk(1);
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check_stall(1); // set?
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#1 check_stall(1); // set?
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// Unstall with register
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// Unstall with register
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set_instruction(`DEBUG);
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set_instruction(`DEBUG);
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chain_select(`CPU_DEBUG_CHAIN, 1'b0); // {chain, gen_crc_err}
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chain_select(`CPU_DEBUG_CHAIN, 1'b0); // {chain, gen_crc_err}
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check_stall(1); // set?
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#1 check_stall(1); // set?
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debug_cpu(`CPU_WRITE_REG, `CPU_OP_ADR, 32'h0, 1'b0, result, "clr unstall"); // {command, addr, data, gen_crc_err, result, text}
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debug_cpu(`CPU_WRITE_REG, `CPU_OP_ADR, 32'h0, 1'b0, result, "clr unstall"); // {command, addr, data, gen_crc_err, result, text}
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check_stall(1); // set?
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#1 check_stall(1); // set?
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debug_cpu(`CPU_GO, 32'h0, 32'h0, 1'b0, result, "go cpu"); // {command, addr, data, gen_crc_err, result, text}
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debug_cpu(`CPU_GO, 32'h0, 32'h0, 1'b0, result, "go cpu"); // {command, addr, data, gen_crc_err, result, text}
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check_stall(0); // reset?
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#1 check_stall(0); // reset?
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// Set stall with register
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// Set stall with register
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debug_cpu(`CPU_WRITE_REG, `CPU_OP_ADR, 32'h0, 1'b0, result, "clr stall"); // {command, addr, data, gen_crc_err, result, text}
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debug_cpu(`CPU_WRITE_REG, `CPU_OP_ADR, 32'h0, 1'b0, result, "clr stall"); // {command, addr, data, gen_crc_err, result, text}
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check_stall(0); // reset?
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#1 check_stall(0); // reset?
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debug_cpu(`CPU_GO, 32'h0, 32'h1, 1'b0, result, "go cpu"); // {command, addr, data, gen_crc_err, result, text}
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debug_cpu(`CPU_GO, 32'h0, 32'h1, 1'b0, result, "go cpu"); // {command, addr, data, gen_crc_err, result, text}
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check_stall(1); // set?
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#1 check_stall(1); // set?
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// Unstall with register
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// Unstall with register
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debug_cpu(`CPU_WRITE_REG, `CPU_OP_ADR, 32'h0, 1'b0, result, "clr unstall"); // {command, addr, data, gen_crc_err, result, text}
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debug_cpu(`CPU_WRITE_REG, `CPU_OP_ADR, 32'h0, 1'b0, result, "clr unstall"); // {command, addr, data, gen_crc_err, result, text}
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check_stall(1); // set?
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#1 check_stall(1); // set?
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debug_cpu(`CPU_GO, 32'h0, 32'h0, 1'b0, result, "go cpu"); // {command, addr, data, gen_crc_err, result, text}
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debug_cpu(`CPU_GO, 32'h0, 32'h0, 1'b0, result, "go cpu"); // {command, addr, data, gen_crc_err, result, text}
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check_stall(0); // reset?
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#1 check_stall(0); // reset?
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$display("\n\n(%0t) stall_test passed\n\n", $time);
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$display("\n\n(%0t) stall_test passed\n\n", $time);
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end
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end
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endtask // stall_test
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endtask // stall_test
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