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Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [sdram_test_working/] [rtl/] [verilog/] [dbg_crc8_d1.v] - Diff between revs 2 and 9

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`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.1.1.1 2001/09/13 13:49:19 mohor`
	`// Initial official release.`
	`//`
`// Revision 1.3 2001/06/01 22:22:36 mohor`	`// Revision 1.3 2001/06/01 22:22:36 mohor`
`// This is a backup. It is not a fully working version. Not for use, yet.`	`// This is a backup. It is not a fully working version. Not for use, yet.`
`//`	`//`
`// Revision 1.2 2001/05/18 13:10:00 mohor`	`// Revision 1.2 2001/05/18 13:10:00 mohor`
`// Headers changed. All additional information is now avaliable in the README.txt file.`	`// Headers changed. All additional information is now avaliable in the README.txt file.`
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`include "dbg_timescale.v"	`include "dbg_timescale.v"
`include "dbg_defines.v"	`include "dbg_defines.v"


`module dbg_crc8_d1 (Data, EnableCrc, ResetCrc, CrcOut, Clk);`	`module dbg_crc8_d1 (Data, EnableCrc, Reset, SyncResetCrc, CrcOut, Clk);`

`parameter Tp = 1;`	`parameter Tp = 1;`


`input Data;`	`input Data;`
`input EnableCrc;`	`input EnableCrc;`
`input ResetCrc;`	`input Reset;`
	`input SyncResetCrc;`
`input Clk;`	`input Clk;`


`output [7:0] CrcOut;`	`output [7:0] CrcOut;`
`reg [7:0] CrcOut;`	`reg [7:0] CrcOut;`


`always @ (posedge Clk or posedge ResetCrc)`	`always @ (posedge Clk or posedge Reset)`
`begin`	`begin`
`if(ResetCrc)`	`if(Reset)`
	`CrcOut[7:0] <= #Tp 0;`
	`else`
	`if(SyncResetCrc)`
`CrcOut[7:0] <= #Tp 0;`	`CrcOut[7:0] <= #Tp 0;`
`else`	`else`
`if(EnableCrc)`	`if(EnableCrc)`
`CrcOut[7:0] <= #Tp nextCRC8_D1(Data, CrcOut);`	`CrcOut[7:0] <= #Tp nextCRC8_D1(Data, CrcOut);`
`end`	`end`
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`end`	`end`
`endfunction`	`endfunction`

`endmodule`	`endmodule`




`No newline at end of file`	`No newline at end of file`

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[/] [dbg_interface/] [tags/] [sdram_test_working/] [rtl/] [verilog/] [dbg_crc8_d1.v] - Diff between revs 2 and 9