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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.17 2002/01/25 07:58:35 mohor
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// IDCODE bug fixed, chains reused to decreas size of core. Data is shifted-in
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// not filled-in. Tested in hw.
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//
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// Revision 1.16 2001/12/20 11:17:26 mohor
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// Revision 1.16 2001/12/20 11:17:26 mohor
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// TDO and TDO Enable signal are separated into two signals.
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// TDO and TDO Enable signal are separated into two signals.
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//
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//
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// Revision 1.15 2001/12/05 13:28:21 mohor
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// Revision 1.15 2001/12/05 13:28:21 mohor
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// trst signal is synchronized to wb_clk_i.
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// trst signal is synchronized to wb_clk_i.
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reg RISCAccess_q2; // Delayed signals used for accessing the RISC
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reg RISCAccess_q2; // Delayed signals used for accessing the RISC
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reg wb_AccessTck; // Indicates access to the WISHBONE
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reg wb_AccessTck; // Indicates access to the WISHBONE
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reg [31:0] WBReadLatch; // Data latched during WISHBONE read
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reg [31:0] WBReadLatch; // Data latched during WISHBONE read
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reg WBErrorLatch; // Error latched during WISHBONE read
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reg WBErrorLatch; // Error latched during WISHBONE read
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reg trst; // trst is active high while trst_pad_i is active low
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wire trst; // trst is active high while trst_pad_i is active low
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reg BypassRegister; // Bypass register
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reg BypassRegister; // Bypass register
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wire TCK = tck_pad_i;
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wire TCK = tck_pad_i;
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/**********************************************************************************
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/**********************************************************************************
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* *
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* *
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* Synchronizing TRST to clock signal *
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* Synchronizing TRST to clock signal *
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* *
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* *
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**********************************************************************************/
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**********************************************************************************/
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always @ (posedge wb_clk_i)
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assign trst <=#Tp ~trst_pad_i; // trst_pad_i is active low
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begin
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trst <=#Tp ~trst_pad_i; // trst_pad_i is active low
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end
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/**********************************************************************************
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/**********************************************************************************
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* *
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* *
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* TAP State Machine: Fully JTAG compliant *
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* TAP State Machine: Fully JTAG compliant *
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