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Subversion Repositories dbg_interface

[/] [dbg_interface/] [trunk/] [bench/] [verilog/] [dbg_tb.v] - Diff between revs 139 and 140

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Rev 139 Rev 140
Line 41... Line 41... 
//////////////////////////////////////////////////////////////////////
 
//////////////////////////////////////////////////////////////////////
 
//
 
//
 
// CVS Revision History
 
// CVS Revision History
 
//
 
//
 
// $Log: not supported by cvs2svn $
 
// $Log: not supported by cvs2svn $
 
 
 
// Revision 1.41  2004/03/28 20:27:40  igorm
 
 
 
// New release of the debug interface (3rd. release).
 
 
 
//
 
// Revision 1.40  2004/03/22 16:36:06  igorm
 
// Revision 1.40  2004/03/22 16:36:06  igorm
 
// Temp version before changing dbg interface.
 
// Temp version before changing dbg interface.
 
//
 
//
 
// Revision 1.39  2004/03/15 16:17:07  igorm
 
// Revision 1.39  2004/03/15 16:17:07  igorm
 
// 'hz changed to 1'hz because Icarus complains.
 
// 'hz changed to 1'hz because Icarus complains.
Line 932... Line 935... 
      gen_clk(1);
 
      gen_clk(1);
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to exit1_dr
 
    gen_clk(1);         // to exit1_dr
 
 
 
 
 
 
 
    if (~crc_match_in)
 
 
 
      begin
 
 
 
        $display("(%0t) Incoming CRC failed !!!", $time);
 
 
 
        $stop;
 
 
 
      end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to update_dr
 
    gen_clk(1);         // to update_dr
 
    tms_pad_i<=#1 1'b0;
 
    tms_pad_i<=#1 1'b0;
 
    gen_clk(1);         // to run_test_idle
 
    gen_clk(1);         // to run_test_idle
 
 
 
 
 
    if (|status)
 
    if (|status)
 
      begin
 
      begin
 
        $write("(*E) (%0t) Chain select error: ", $time);
 
        $write("(*E) (%0t) Module select error: ", $time);
 
        casex (status)
 
        casex (status)
 
          4'b1xxx : $display("CRC error !!!\n\n", $time);
 
          4'b1xxx : $display("CRC error !!!\n\n", $time);
 
          4'bx1xx : $display("Non-existing module selected !!!\n\n", $time);
 
          4'bx1xx : $display("Non-existing module selected !!!\n\n", $time);
 
          4'bxx1x : $display("Status[1] should be 1'b0 !!!\n\n", $time);
 
          4'bxx1x : $display("Status[1] should be 1'b0 !!!\n\n", $time);
 
          4'bxxx1 : $display("Status[0] should be 1'b0 !!!\n\n", $time);
 
          4'bxxx1 : $display("Status[0] should be 1'b0 !!!\n\n", $time);
Line 1124... Line 1133... 
    end
 
    end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to exit1_dr
 
    gen_clk(1);         // to exit1_dr
 
 
 
 
 
 
 
    if (~crc_match_in)
 
 
 
      begin
 
 
 
        $display("(%0t) Incoming CRC failed !!!", $time);
 
 
 
        $stop;
 
 
 
      end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to update_dr
 
    gen_clk(1);         // to update_dr
 
    tms_pad_i<=#1 1'b0;
 
    tms_pad_i<=#1 1'b0;
 
    gen_clk(1);         // to run_test_idle
 
    gen_clk(1);         // to run_test_idle
 
  end
 
  end
Line 1219... Line 1234... 
    end
 
    end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to exit1_dr
 
    gen_clk(1);         // to exit1_dr
 
 
 
 
 
 
 
    if (~crc_match_in)
 
 
 
      begin
 
 
 
        $display("(%0t) Incoming CRC failed !!!", $time);
 
 
 
        $stop;
 
 
 
      end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to update_dr
 
    gen_clk(1);         // to update_dr
 
    tms_pad_i<=#1 1'b0;
 
    tms_pad_i<=#1 1'b0;
 
    gen_clk(1);         // to run_test_idle
 
    gen_clk(1);         // to run_test_idle
 
  end
 
  end
Line 1515... Line 1536... 
    end
 
    end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to exit1_dr
 
    gen_clk(1);         // to exit1_dr
 
 
 
 
 
 
 
    if (~crc_match_in)
 
 
 
      begin
 
 
 
        $display("(%0t) Incoming CRC failed !!!", $time);
 
 
 
        $stop;
 
 
 
      end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to update_dr
 
    gen_clk(1);         // to update_dr
 
    tms_pad_i<=#1 1'b0;
 
    tms_pad_i<=#1 1'b0;
 
    gen_clk(1);         // to run_test_idle
 
    gen_clk(1);         // to run_test_idle
 
  end
 
  end
Line 1605... Line 1632... 
    end
 
    end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to exit1_dr
 
    gen_clk(1);         // to exit1_dr
 
 
 
 
 
 
 
    if (~crc_match_in)
 
 
 
      begin
 
 
 
        $display("(%0t) Incoming CRC failed !!!", $time);
 
 
 
        $stop;
 
 
 
      end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to update_dr
 
    gen_clk(1);         // to update_dr
 
    tms_pad_i<=#1 1'b0;
 
    tms_pad_i<=#1 1'b0;
 
    gen_clk(1);         // to run_test_idle
 
    gen_clk(1);         // to run_test_idle
 
  end
 
  end
Line 1691... Line 1724... 
    end
 
    end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to exit1_dr
 
    gen_clk(1);         // to exit1_dr
 
 
 
 
 
 
 
    if (~crc_match_in)
 
 
 
      begin
 
 
 
        $display("(%0t) Incoming CRC failed !!!", $time);
 
 
 
        $stop;
 
 
 
      end
 
 
 
 
 
    tms_pad_i<=#1 1'b1;
 
    tms_pad_i<=#1 1'b1;
 
    gen_clk(1);         // to update_dr
 
    gen_clk(1);         // to update_dr
 
    tms_pad_i<=#1 1'b0;
 
    tms_pad_i<=#1 1'b0;
 
    gen_clk(1);         // to run_test_idle
 
    gen_clk(1);         // to run_test_idle
 
  end
 
  end

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