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Line 41... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.42 2004/03/30 23:10:39 igorm
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// CRC checking of incoming CRC added to all tasks.
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//
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// Revision 1.41 2004/03/28 20:27:40 igorm
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// Revision 1.41 2004/03/28 20:27:40 igorm
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// New release of the debug interface (3rd. release).
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// New release of the debug interface (3rd. release).
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//
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//
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// Revision 1.40 2004/03/22 16:36:06 igorm
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// Revision 1.40 2004/03/22 16:36:06 igorm
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// Temp version before changing dbg interface.
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// Temp version before changing dbg interface.
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| Line 1342... |
Line 1345... |
tdi_pad_i<=#1 1'hz;
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tdi_pad_i<=#1 1'hz;
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crc_in = {`DBG_WB_CRC_LEN{1'b1}}; // Initialize incoming CRC to all ff
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crc_in = {`DBG_WB_CRC_LEN{1'b1}}; // Initialize incoming CRC to all ff
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if ((last_wb_cmd == `DBG_WB_READ8) | (last_wb_cmd == `DBG_WB_READ16) | (last_wb_cmd == `DBG_WB_READ32)) // When WB_READx was previously activated, data needs to be shifted.
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if ((last_wb_cmd == `DBG_WB_READ8) | (last_wb_cmd == `DBG_WB_READ16) | (last_wb_cmd == `DBG_WB_READ32)) // When WB_READx was previously activated, data needs to be shifted.
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begin
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begin
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$display("\t\tGenerating %0d clocks to read %0d data bytes.", dbg_tb.i_dbg_top.i_dbg_wb.data_cnt_limit, dbg_tb.i_dbg_top.i_dbg_wb.data_cnt_limit>>3);
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$display("\t\tGenerating %0d clocks to read %0d data bytes.", dbg_tb.i_dbg_top.i_dbg_wb.data_cnt_limit<<3, dbg_tb.i_dbg_top.i_dbg_wb.data_cnt_limit);
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word_pointer = 0; // Reset pointer
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word_pointer = 0; // Reset pointer
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for (i=0; i<(dbg_tb.i_dbg_top.i_dbg_wb.data_cnt_limit); i=i+1)
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for (i=0; i<(dbg_tb.i_dbg_top.i_dbg_wb.data_cnt_limit<<3); i=i+1)
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begin
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begin
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gen_clk(1);
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gen_clk(1);
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if (i[4:0] == 31) // Latching data
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if (i[4:0] == 31) // Latching data
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begin
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begin
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wb_data[word_pointer] = in_data_be;
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wb_data[word_pointer] = in_data_be;
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| Line 1830... |
Line 1833... |
tdi_pad_i<=#1 1'hz;
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tdi_pad_i<=#1 1'hz;
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crc_in = {`DBG_CPU_CRC_LEN{1'b1}}; // Initialize incoming CRC to all ff
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crc_in = {`DBG_CPU_CRC_LEN{1'b1}}; // Initialize incoming CRC to all ff
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if (last_cpu_cmd == `DBG_CPU_READ) // When DBG_CPU_READ was previously activated, data needs to be shifted.
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if (last_cpu_cmd == `DBG_CPU_READ) // When DBG_CPU_READ was previously activated, data needs to be shifted.
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begin
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begin
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$display("\t\tGenerating %0d clocks to read %0d data bytes.", dbg_tb.i_dbg_top.i_dbg_cpu.data_cnt_limit, dbg_tb.i_dbg_top.i_dbg_cpu.data_cnt_limit>>3);
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$display("\t\tGenerating %0d clocks to read %0d data bytes.", dbg_tb.i_dbg_top.i_dbg_cpu.data_cnt_limit<<3, dbg_tb.i_dbg_top.i_dbg_cpu.data_cnt_limit);
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word_pointer = 0; // Reset pointer
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word_pointer = 0; // Reset pointer
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for (i=0; i<(dbg_tb.i_dbg_top.i_dbg_cpu.data_cnt_limit); i=i+1)
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for (i=0; i<(dbg_tb.i_dbg_top.i_dbg_cpu.data_cnt_limit<<3); i=i+1)
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begin
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begin
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gen_clk(1);
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gen_clk(1);
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if (i[4:0] == 31) // Latching data
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if (i[4:0] == 31) // Latching data
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begin
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begin
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wb_data[word_pointer] = in_data_be;
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wb_data[word_pointer] = in_data_be;
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