OpenCores
URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [trunk/] [rtl/] [verilog/] [dbg_cpu_defines.v] - Diff between revs 101 and 138

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 101 Rev 138
Line 41... Line 41...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.2  2004/01/17 17:01:14  mohor
 
// Almost finished.
 
//
// Revision 1.1  2004/01/16 14:53:33  mohor
// Revision 1.1  2004/01/16 14:53:33  mohor
// *** empty log message ***
// *** empty log message ***
//
//
//
//
//
//
Line 70... Line 73...
 
 
// Registers addresses
// Registers addresses
`define CPU_OP_ADR     2'd0
`define CPU_OP_ADR     2'd0
`define CPU_SEL_ADR    2'd1
`define CPU_SEL_ADR    2'd1
 
 
 
// Defining length of the CRC
 
`define DBG_CPU_CRC_LEN     32
 
 
 
// Defining length of the status
 
`define DBG_CPU_STATUS_LEN  4
 
 
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.