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////////////////////////////////////////////////////////////////////////////
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//
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// Filename: qtrstage_tb.cpp
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//
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// Project: A Doubletime Pipelined FFT
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//
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// Purpose: A test-bench for the qtrstage.v subfile of the double
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// clocked FFT. This file may be run autonomously. If so,
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// the last line output will either read "SUCCESS" on success,
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// or some other failure message otherwise.
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//
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// This file depends upon verilator to both compile, run, and
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// therefore test qtrstage.v
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Tecnology, LLC
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//
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///////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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///////////////////////////////////////////////////////////////////////////
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#include <stdio.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdint.h>
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#include "Vqtrstage.h"
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#include "Vqtrstage.h"
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#include "verilated.h"
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#include "verilated.h"
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#define IWIDTH 16
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#define OWIDTH (IWIDTH+1)
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#define LGWIDTH 8
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void tick(Vqtrstage *qstage) {
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void tick(Vqtrstage *qstage) {
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qstage->i_clk = 0;
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qstage->i_clk = 0;
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qstage->eval();
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qstage->eval();
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qstage->i_clk = 1;
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qstage->i_clk = 1;
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qstage->eval();
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qstage->eval();
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int32_t smr, smi, dfr, dfi;
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int32_t smr, smi, dfr, dfi;
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int rnd = 0;
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int rnd = 0;
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reset(qstage);
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reset(qstage);
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for(int k=0; k<270; k++) {
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for(int k=0; k<1060; k++) {
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int32_t or0, oi0, or1, oi1;
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int32_t or0, oi0, or1, oi1;
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qstage->i_ce = 1;
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qstage->i_ce = 1;
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qstage->i_sync = ((k&0x0ff)==0);
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qstage->i_sync = ((k&0x0ff)==0);
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// Let's pick some random values, ...
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// Let's pick some random values, ...
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ii0 = rand(); if (ii0&2) ii0 = -ii0;
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ii0 = rand(); if (ii0&2) ii0 = -ii0;
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qstage->i_data = ((ir0&0x0ffff) << 16) | (ii0 & 0x0ffff);
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qstage->i_data = ((ir0&0x0ffff) << 16) | (ii0 & 0x0ffff);
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tick(qstage);
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tick(qstage);
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printf("k=%3d: ISYNC=%d, IN = %08x, OUT =%09lx, SYNC=%d\n",
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printf("k=%4d: ISYNC=%d, IN = %08x, OUT =%09lx, SYNC=%d\n",
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k, qstage->i_sync, qstage->i_data,
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k, qstage->i_sync, qstage->i_data,
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qstage->o_data, qstage->o_sync);
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qstage->o_data, qstage->o_sync);
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or0 = (qstage->o_data >> 17) & 0x01ffff;
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or0 = (qstage->o_data >> 17) & 0x01ffff;
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oi0 = qstage->o_data & 0x01ffff;
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oi0 = qstage->o_data & 0x01ffff;
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if (or0 != difr) {fprintf(stderr, "FAIL 3\n"); exit(-1);}
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if (or0 != difr) {fprintf(stderr, "FAIL 3\n"); exit(-1);}
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if (oi0 != difi) {fprintf(stderr, "FAIL 4\n"); exit(-1);}
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if (oi0 != difi) {fprintf(stderr, "FAIL 4\n"); exit(-1);}
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}
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}
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}
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}
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if (((4==(k&0x0ff))?1:0) != qstage->o_sync) { fprintf(stderr, "BAD O-SYNC\n"); exit(-1); }
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if (((4==(k&0x07f))?1:0) != qstage->o_sync) { fprintf(stderr, "BAD O-SYNC\n"); exit(-1); }
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if (1 == (k&1)) {
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if (1 == (k&1)) {
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sumr = smr; sumi = smi; difr=dfr, difi= dfi;
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sumr = smr; sumi = smi; difr=dfr, difi= dfi;
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smr = lstr + ir0 + rnd;
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smr = lstr + ir0 + rnd;
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