OpenCores
URL https://opencores.org/ocsvn/dblclockfft/dblclockfft/trunk

Subversion Repositories dblclockfft

[/] [dblclockfft/] [trunk/] [sw/] [fftgen.cpp] - Diff between revs 31 and 32

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 31 Rev 32
Line 26... Line 26...
// Creator:     Dan Gisselquist, Ph.D.
// Creator:     Dan Gisselquist, Ph.D.
//              Gisselquist Technology, LLC
//              Gisselquist Technology, LLC
//
//
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
//
// Copyright (C) 2015, Gisselquist Technology, LLC
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
//
// This program is free software (firmware): you can redistribute it and/or
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of  the GNU General Public License as published
// modify it under the terms of  the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
// your option) any later version.
Line 141... Line 141...
} ROUND_T;
} ROUND_T;
 
 
const char      cpyleft[] =
const char      cpyleft[] =
"////////////////////////////////////////////////////////////////////////////////\n"
"////////////////////////////////////////////////////////////////////////////////\n"
"//\n"
"//\n"
"// Copyright (C) 2015, Gisselquist Technology, LLC\n"
"// Copyright (C) 2015-2016, Gisselquist Technology, LLC\n"
"//\n"
"//\n"
"// This program is free software (firmware): you can redistribute it and/or\n"
"// This program is free software (firmware): you can redistribute it and/or\n"
"// modify it under the terms of  the GNU General Public License as published\n"
"// modify it under the terms of  the GNU General Public License as published\n"
"// by the Free Software Foundation, either version 3 of the License, or (at\n"
"// by the Free Software Foundation, either version 3 of the License, or (at\n"
"// your option) any later version.\n"
"// your option) any later version.\n"
Line 2239... Line 2239...
// "\tfftgen -i\n"
// "\tfftgen -i\n"
"\t-1\tBuild a normal FFT, running at one clock per complex sample, or (for\n"
"\t-1\tBuild a normal FFT, running at one clock per complex sample, or (for\n"
"\t\ta real FFT) at one clock per two real input samples.\n"
"\t\ta real FFT) at one clock per two real input samples.\n"
"\t-c <cbits>\tCauses all internal complex coefficients to be\n"
"\t-c <cbits>\tCauses all internal complex coefficients to be\n"
"\t\tlonger than the corresponding data bits, to help avoid\n"
"\t\tlonger than the corresponding data bits, to help avoid\n"
"\t\tcoefficient truncation errors.  The default is %d bits lnoger\n"
"\t\tcoefficient truncation errors.  The default is %d bits longer\n"
"\t\tthan the data bits.\n"
"\t\tthan the data bits.\n"
"\t-d <dir>\tPlaces all of the generated verilog files into <dir>.\n"
"\t-d <dir>\tPlaces all of the generated verilog files into <dir>.\n"
"\t\tThe default is a subdirectory of the current directory named %s.\n"
"\t\tThe default is a subdirectory of the current directory named %s.\n"
"\t-f <size>\tSets the size of the FFT as the number of complex\n"
"\t-f <size>\tSets the size of the FFT as the number of complex\n"
"\t\tsamples input to the transform.  (No default value, this is\n"
"\t\tsamples input to the transform.  (No default value, this is\n"
Line 2659... Line 2659...
        fprintf(vmain, "//      i_clk\tThe clock.  All operations are synchronous with this clock.\n");
        fprintf(vmain, "//      i_clk\tThe clock.  All operations are synchronous with this clock.\n");
        fprintf(vmain, "//\ti_rst\tSynchronous reset, active high.  Setting this line will\n");
        fprintf(vmain, "//\ti_rst\tSynchronous reset, active high.  Setting this line will\n");
        fprintf(vmain, "//\t\t\tforce the reset of all of the internals to this routine.\n");
        fprintf(vmain, "//\t\t\tforce the reset of all of the internals to this routine.\n");
        fprintf(vmain, "//\t\t\tFurther, following a reset, the o_sync line will go\n");
        fprintf(vmain, "//\t\t\tFurther, following a reset, the o_sync line will go\n");
        fprintf(vmain, "//\t\t\thigh the same time the first output sample is valid.\n");
        fprintf(vmain, "//\t\t\thigh the same time the first output sample is valid.\n");
        fprintf(vmain, "//      i_ce\tA clock enable line.  If this line is set, this module\n");
        fprintf(vmain, "//\ti_ce\tA clock enable line.  If this line is set, this module\n");
        fprintf(vmain, "//\t\t\twill accept two complex values as inputs, and produce\n");
        fprintf(vmain, "//\t\t\twill accept two complex values as inputs, and produce\n");
        fprintf(vmain, "//\t\t\ttwo (possibly empty) complex values as outputs.\n");
        fprintf(vmain, "//\t\t\ttwo (possibly empty) complex values as outputs.\n");
        fprintf(vmain, "//\t\ti_left\tThe first of two complex input samples.  This value\n");
        fprintf(vmain, "//\ti_left\tThe first of two complex input samples.  This value is split\n");
        fprintf(vmain, "//\t\t\tis split into two two\'s complement numbers, of \n");
        fprintf(vmain, "//\t\t\tinto two two\'s complement numbers, %d bits each, with\n", nbitsin);
        fprintf(vmain, "//\t\t\t%d bits each, with the real portion in the high\n", nbitsin);
        fprintf(vmain, "//\t\t\tthe real portion in the high order bits, and the\n");
        fprintf(vmain, "//\t\t\torder bits, and the imaginary portion taking the\n");
        fprintf(vmain, "//\t\t\timaginary portion taking the bottom %d bits.\n", nbitsin);
        fprintf(vmain, "//\t\t\tbottom %d bits.\n", nbitsin);
        fprintf(vmain, "//\ti_right\tThis is the same thing as i_left, only this is the second of\n");
        fprintf(vmain, "//\t\ti_right\tThis is the same thing as i_left, only this is the\n");
        fprintf(vmain, "//\t\t\ttwo such samples.  Hence, i_left would contain input\n");
        fprintf(vmain, "//\t\t\tsecond of two such samples.  Hence, i_left would\n");
        fprintf(vmain, "//\t\t\tsample zero, i_right would contain sample one.  On the\n");
        fprintf(vmain, "//\t\t\tcontain input sample zero, i_right would contain\n");
        fprintf(vmain, "//\t\t\tnext clock i_left would contain input sample two,\n");
        fprintf(vmain, "//\t\t\tsample one.  On the next clock i_left would contain\n");
        fprintf(vmain, "//\t\t\ti_right number three and so forth.\n");
        fprintf(vmain, "//\t\t\tinput sample two, i_right number three and so forth.\n");
        fprintf(vmain, "//\to_left\tThe first of two output samples, of the same format as i_left,\n");
        fprintf(vmain, "//\t\to_left\tThe first of two output samples, of the same\n");
        fprintf(vmain, "//\t\t\tonly having %d bits for each of the real and imaginary\n", nbitsout);
        fprintf(vmain, "//\t\t\tformat as i_left, only having %d bits for each of\n", nbitsout);
        fprintf(vmain, "//\t\t\tcomponents, leading to %d bits total.\n", nbitsout*2);
        fprintf(vmain, "//\t\t\tthe real and imaginary components, leading to %d\n", nbitsout*2);
        fprintf(vmain, "//\to_right\tThe second of two output samples produced each clock.  This has\n");
        fprintf(vmain, "//\t\t\tbits total.\n");
        fprintf(vmain, "//\t\t\tthe same format as o_left.\n");
        fprintf(vmain, "//\t\to_right\tThe second of two output samples produced each clock.\n");
        fprintf(vmain, "//\to_sync\tA one bit output indicating the first valid sample produced by\n");
        fprintf(vmain, "//\t\t\tThis has the same format as o_left.\n");
        fprintf(vmain, "//\t\t\tthis FFT following a reset.  Ever after, this will\n");
        fprintf(vmain, "//\t\to_sync\tA one bit output indicating the first valid sample\n");
        fprintf(vmain, "//\t\t\tindicate the first sample of an FFT frame.\n");
        fprintf(vmain, "//\t\t\tproduced by this FFT following a reset.  Ever after,\n");
 
        fprintf(vmain, "//\t\t\tthis will indicate the first sample of an FFT frame.\n");
 
        fprintf(vmain, "//\n");
        fprintf(vmain, "//\n");
        fprintf(vmain, "// Arguments:\tThis file was computer generated using the\n");
        fprintf(vmain, "// Arguments:\tThis file was computer generated using the\n");
        fprintf(vmain, "//\t\tfollowing command line:\n");
        fprintf(vmain, "//\t\tfollowing command line:\n");
        fprintf(vmain, "//\n");
        fprintf(vmain, "//\n");
        fprintf(vmain, "//\t\t%% %s\n", cmdline.c_str());
        fprintf(vmain, "//\t\t%% %s\n", cmdline.c_str());

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.