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-- Create Date: 15:24:38 11/05/2006
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-- Design Name:
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-- Module Name: Hash key
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-- Project Name: Deflate
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-- Target Device:
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-- Dependencies: Hashchain.vhdl
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--
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-- Revision:
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-- Revision 0.50 - Works but not optimised
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-- Additional Comments:
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-- A wrapper for the DJB2 algorithm has a 3 byte buffer and uses an extra input byte generate
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-- to generate 4 byte hash keys
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--
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--------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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use work.mat.all;
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use work.all;
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entity hash_key is
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--generic definitions, data bus widths.
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generic
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(
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hash_width: natural := 32;
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data_width: natural := 8);
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port
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(
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data_in: in std_logic_vector(data_width -1 downto 0);
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hash_out: out std_logic_vector (hash_width -1 downto 0);
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Clock,
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reset,
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start : in bit;
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ready, -- Not used
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busy: out bit);
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end hash_key;
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architecture genhash of hash_key is
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component HashChain
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Generic (
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Data_Width : natural := 8; -- Data Bus width
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Hash_Width : natural := 32 -- Width of the hash key generated
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);
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Port(
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Hash_o : out std_logic_vector (Hash_Width - 1 downto 0); -- Hash key
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Data_in : in std_logic_vector (Data_Width -1 downto 0); -- Data input from byte stream
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Busy, -- Busy
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Done: out bit; -- Key generated
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Clock, -- Clock
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Reset, -- Reset
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Start, -- Start the hash key generation
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O_E : in bit -- Output Enable
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);
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end component;
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signal hg1: std_logic_vector ( (Hash_Width -1) downto 0); -- Accept a 32 bit hash input
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signal Datain, Buffer_1, Buffer_2, Buffer_3 : std_logic_vector (Data_Width-1 downto 0); -- 8 bit io buffers
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signal Algo_start, Algo_clk,Algo_rst,Algo_op, Algo_bsy, Key_done: bit; -- Algorithm interface aignals
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signal mode, buff_count, proc_count :integer;
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begin
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glink:HashChain port map (Hash_O => hg1,
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Data_in => Datain,
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Clock => Algo_clk,
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Reset => Algo_rst,
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Start => Algo_start,
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O_E => Algo_op,
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Busy => Algo_bsy,
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Done => Key_done);
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-- 3 byte input buffer
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-- Stores the last 3 bytes used to generate a hash key to keep the hash keys current
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-- The hash algorightm is reset after every 4 byte key is generated
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-- to ensure that the matches are of 4 byte lengths
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Buffer_1 <= X"00" when mode = 0 else
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Buffer_2 when mode = 2 else
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Buffer_1;
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Buffer_2 <= X"00" when mode = 0 else
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Buffer_3 when mode = 2 else
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Buffer_2;
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Buffer_3 <= X"00" when mode = 0 else
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Data_in when mode = 2 else
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Buffer_3;
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--Common Clock
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Algo_clk <= Clock;
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-- Reset the hash algorithm when reset
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Algo_rst <= '1' when mode = 0 or mode = 1else
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'0';
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--Sync signals
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busy <= '1' when mode > 1 else
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'0';
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--Send a start for every input byte.
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Algo_start <= '1' when mode = 2 and buff_count = 3 else -- the 3 byte buffer is empty
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'1' when mode = 4 else -- 3 byte buffer is full and one byte has been processed
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'0';
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-- 4 bytes sent one after the other to the hashing algorithm
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Datain <= X"00" when mode = 0 or mode = 1 else
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Buffer_1 when mode = 2 and buff_count = 3 else
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Buffer_1 when mode = 4 and buff_count = 3 and proc_count = 1 else
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Buffer_2 when mode = 4 and buff_count = 3 and proc_count = 2 else
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Buffer_3 when mode = 4 and buff_count = 3 and proc_count = 3 else
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X"00";
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-- Enabling hash algo output
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Algo_op <= '1' when proc_count > 2 else
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'0';
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--Buffer counter
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buffer_counter: process (mode)
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begin
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if mode = 0 then
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buff_count <= 0; -- Reset
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elsif mode = 2 and buff_count < 3 then
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buff_count <= buff_count + 1; -- 1 byte added to buffer
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else
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buff_count <= buff_count; -- BUffer is full keep the buffered values and the count
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end if;
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end process buffer_counter;
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-- Procesed bytes counter
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processed_counter: process (mode)
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begin
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if (mode = 2 and buff_count = 3) or mode = 4 then
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proc_count <= proc_count + 1 ;
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elsif mode = 3 then
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proc_count <= proc_count;
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else
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proc_count <= 0;
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end if;
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end process processed_counter;
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-- mealy machine, sends 4 bytes sequentially to the hashing algorithm
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-- Waits for the buffer to get filled, on the first +ve clock edge afer the start input
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-- is made 1 it sends the bytes to the DJB algorithm.
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mealy_mach: process (Clock, Reset, Start)
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Begin
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-- +ve clock
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if Clock'event and Clock = '1' then
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if Reset = '1' then -- Reset
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mode <= 0;
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--Start either fill the buffer or Process the first byte in buffer
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elsif Start = '1' and mode < 2 then
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mode <= 2;
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-- Buffer is still processing first byte
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-- wait while algorithm finishes generating hash
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elsif (mode = 2 and buff_count = 3) or (mode > 1 and Algo_bsy = '1') then
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mode <= 3;
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-- To hash the next 3 bytes
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elsif mode = 3 and proc_count < 4 then
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mode <= 4;
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-- Wait
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else
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mode <= 1;
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end if;
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end if;
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end process mealy_mach;
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end genhash;
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