OpenCores
URL https://opencores.org/ocsvn/desxcore/desxcore/trunk

Subversion Repositories desxcore

[/] [desxcore/] [trunk/] [tb/] [tb_des_loop.vhd] - Diff between revs 2 and 3

Show entire file | Details | Blame | View Log

Rev 2 Rev 3
Line 1... Line 1...
--------------------------------------------------------------------------------
 
-- Company: 
-- Copyright (c) 2013 Antonio de la Piedra
-- Engineer:
 
--
-- This program is free software: you can redistribute it and/or modify
-- Create Date:   11:47:33 02/21/2013
-- it under the terms of the GNU General Public License as published by
-- Design Name:   
-- the Free Software Foundation, either version 3 of the License, or
-- Module Name:   C:/Users/vmr/Desktop/crypto_ng/des/dram/desl/tb_des_loop.vhd
-- (at your option) any later version.
-- Project Name:  desl
 
-- Target Device:  
-- This program is distributed in the hope that it will be useful,
-- Tool versions:  
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- Description:   
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- 
-- GNU General Public License for more details.
-- VHDL Test Bench Created by ISE for module: des_loop
 
-- 
-- You should have received a copy of the GNU General Public License
-- Dependencies:
-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
-- 
 
-- Revision:
 
-- Revision 0.01 - File Created
 
-- Additional Comments:
 
--
 
-- Notes: 
 
-- This testbench has been automatically generated using types std_logic and
 
-- std_logic_vector for the ports of the unit under test.  Xilinx recommends
 
-- that these types always be used for the top-level I/O of a design in order
 
-- to guarantee that the testbench will bind correctly to the post-implementation 
 
-- simulation model.
 
--------------------------------------------------------------------------------
 
LIBRARY ieee;
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_1164.ALL;
 
 
-- Uncomment the following library declaration if using
 
-- arithmetic functions with Signed or Unsigned values
 
--USE ieee.numeric_std.ALL;
 
 
 
ENTITY tb_des_loop IS
ENTITY tb_des_loop IS
END tb_des_loop;
END tb_des_loop;
 
 
ARCHITECTURE behavior OF tb_des_loop IS
ARCHITECTURE behavior OF tb_des_loop IS
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.