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https://opencores.org/ocsvn/dmt_tx/dmt_tx/trunk
[/] [dmt_tx/] [trunk/] [myhdl/] [rtl/] [cmath.py] - Diff between revs 31 and 32
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Rev 32 |
Line 97... |
Line 97... |
This turns out to be:
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This turns out to be:
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y_re = a_re * b_re - a_im * b_im
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y_re = a_re * b_re - a_im * b_im
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y_im = a_re * b_im + a_im * b_re
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y_im = a_re * b_im + a_im * b_re
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The output is expected to have at least the same width as the input.
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The products are scaled back to the input width and in case an extra
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bit would be needed due to the addition or subtraction, an overflow
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is signaled.
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At the moment the overflowing output is saturated to the respective
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limit, based on the input width. So a wider output width is not used
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with the current implementation.
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I/O pins:
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I/O pins:
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=========
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=========
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a : input a
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a : input a
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b : input b
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b : input b
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# use input width of a_re, assume a_im, b_re and b_im are the same
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# use input width of a_re, assume a_im, b_re and b_im are the same
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width = len(a_re)
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width = len(a_re)
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# calculate min and max value range
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# calculate min and max value range
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smin = -2**(width-1)
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smin = -2**(width-1)
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smax = 2**(width-1)-1
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smax = 2**(width-1)
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#print 'cmult input width: ', width
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#print 'cmult input width: ', width
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prod_a = a_re * b_re
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prod_a = a_re * b_re
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prod_b = a_im * b_im
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prod_b = a_im * b_im
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